Searched refs:REG_A5XX_CP_RB_WPTR (Results 1 – 3 of 3) sorted by relevance
43 gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); in a5xx_flush()823 gpu_read(gpu, REG_A5XX_CP_RB_WPTR)); in a5xx_idle()960 gpu_read(gpu, REG_A5XX_CP_RB_WPTR), in a5xx_fault_detect_irq()1025 REG_ADRENO_DEFINE(REG_ADRENO_CP_RB_WPTR, REG_A5XX_CP_RB_WPTR),
52 gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); in update_wptr()
930 #define REG_A5XX_CP_RB_WPTR 0x00000807 macro