/Linux-v5.4/arch/hexagon/include/asm/ |
D | elf.h | 91 #define CS_COPYREGS(DEST,REGS) \ argument 93 DEST.cs0 = REGS->cs0;\ 94 DEST.cs1 = REGS->cs1;\ 97 #define CS_COPYREGS(DEST,REGS) argument 100 #define ELF_CORE_COPY_REGS(DEST, REGS) \ argument 102 DEST.r0 = REGS->r00; \ 103 DEST.r1 = REGS->r01; \ 104 DEST.r2 = REGS->r02; \ 105 DEST.r3 = REGS->r03; \ 106 DEST.r4 = REGS->r04; \ [all …]
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/Linux-v5.4/arch/arm/probes/ |
D | decode-arm.c | 156 REGS(0, NOPC, 0, 0, 0)), 163 REGS(0, 0, 0, 0, NOPC)), 167 REGS(0, NOPC, 0, 0, NOPC)), 174 REGS(NOPC, NOPC, 0, 0, NOPC)), 190 REGS(NOPC, NOPC, NOPC, 0, NOPC)), 196 REGS(NOPC, 0, NOPC, 0, NOPC)), 202 REGS(NOPC, NOPC, NOPC, 0, NOPC)), 213 REGS(NOPC, 0, NOPC, 0, NOPC)), 220 REGS(NOPC, NOPC, NOPC, 0, NOPC)), 233 REGS(NOPC, NOPC, NOPC, 0, NOPC)), [all …]
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D | decode-thumb.c | 54 REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)), 59 REGS(NOSP, 0, 0, 0, NOSPPC)), 79 REGS(NOSPPC, 0, 0, 0, NOSPPC)), 85 REGS(NOPC, 0, 0, 0, NOSPPC)), 90 REGS(0, 0, NOSPPC, 0, NOSPPC)), 105 REGS(SP, 0, SP, 0, NOSPPC)), 114 REGS(SP, 0, NOPC, 0, NOSPPC)), 128 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), 139 REGS(NOSPPC, 0, 0, 0, 0)), 145 REGS(NOPC, 0, 0, 0, 0)), [all …]
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D | decode.h | 287 #define REGS(r16, r12, r8, r4, r0) \ macro
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/Linux-v5.4/drivers/gpu/drm/msm/adreno/ |
D | a6xx_gpu_state.h | 279 #define REGS(_array, _sel_reg, _sel_val) \ macro 284 REGS(a6xx_registers, 0, 0), 285 REGS(a6xx_rb_rac_registers, REG_A6XX_RB_RB_SUB_BLOCK_SEL_CNTL_CD, 0), 286 REGS(a6xx_rb_rbp_registers, REG_A6XX_RB_RB_SUB_BLOCK_SEL_CNTL_CD, 9), 311 REGS(a6xx_ahb_registers, 0, 0), 312 REGS(a6xx_vbif_registers, 0, 0), 352 REGS(a6xx_gmu_cx_registers, 0, 0), 353 REGS(a6xx_gmu_gx_registers, 0, 0),
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/Linux-v5.4/drivers/video/fbdev/nvidia/ |
D | nv_setup.c | 298 par->PRAMIN = par->REGS + (0x00710000 / 4); in NVCommonSetup() 299 par->PCRTC0 = par->REGS + (0x00600000 / 4); in NVCommonSetup() 300 par->PRAMDAC0 = par->REGS + (0x00680000 / 4); in NVCommonSetup() 301 par->PFB = par->REGS + (0x00100000 / 4); in NVCommonSetup() 302 par->PFIFO = par->REGS + (0x00002000 / 4); in NVCommonSetup() 303 par->PGRAPH = par->REGS + (0x00400000 / 4); in NVCommonSetup() 304 par->PEXTDEV = par->REGS + (0x00101000 / 4); in NVCommonSetup() 305 par->PTIMER = par->REGS + (0x00009000 / 4); in NVCommonSetup() 306 par->PMC = par->REGS + (0x00000000 / 4); in NVCommonSetup() 307 par->FIFO = par->REGS + (0x00800000 / 4); in NVCommonSetup() [all …]
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D | nv_type.h | 155 volatile u32 __iomem *REGS; member
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D | nvidia.c | 1205 id = NV_RD32(par->REGS, 0x1800); in nvidia_get_chipset() 1321 par->REGS = ioremap(nvidiafb_fix.mmio_start, nvidiafb_fix.mmio_len); in nvidiafb_probe() 1323 if (!par->REGS) { in nvidiafb_probe() 1410 iounmap(par->REGS); in nvidiafb_probe() 1435 iounmap(par->REGS); in nvidiafb_remove()
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D | nv_hw.c | 1225 j = NV_RD32(par->REGS, 0x1540) & 0xff; in NVLoadStateExt()
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/Linux-v5.4/arch/alpha/include/asm/ |
D | elf.h | 114 #define ELF_CORE_COPY_REGS(DEST, REGS) \ argument 115 dump_elf_thread(DEST, REGS, current_thread_info());
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/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
D | uvd_v4_2.c | 607 WREG32_FIELD(UVD_CGC_GATE, REGS, 0); in uvd_v4_2_set_dcm()
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/Linux-v5.4/sound/pci/ali5451/ |
D | ali5451.c | 160 struct REGS { struct
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/Linux-v5.4/Documentation/virt/kvm/ |
D | api.txt | 4490 certain guest registers without having to call SET/GET_*REGS. Thus we can 4700 without having to call SET/GET_*REGS". This reduces overhead by eliminating
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