Searched refs:REGISTER_PLL_DIV (Results 1 – 1 of 1) sorted by relevance
1476 #define REGISTER_PLL_DIV(s, ...) _REGISTER(&bcm2835_register_pll_divider, \ macro1641 [BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(1651 [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(1661 [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(1670 [BCM2835_PLLA_CCP2] = REGISTER_PLL_DIV(1707 [BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(1717 [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(1727 [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(1737 [BCM2835_PLLC_PER] = REGISTER_PLL_DIV(1769 [BCM2835_PLLD_CORE] = REGISTER_PLL_DIV([all …]
