| /Linux-v5.4/drivers/gpu/drm/i915/gvt/ |
| D | mmio_context.c | 45 {RCS0, GFX_MODE_GEN7, 0xffff, false}, /* 0x229c */
46 {RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
47 {RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
48 {RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
49 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
50 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
51 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
52 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
53 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
54 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
[all …]
|
| D | scheduler.c | 100 if (workload->ring_id != RCS0) in sr_oa_regs()
156 if (ring_id == RCS0) { in populate_shadow_context()
184 if (IS_BROADWELL(gvt->dev_priv) && ring_id == RCS0) in populate_shadow_context()
434 if (workload->ring_id == RCS0 && workload->wa_ctx.indirect_ctx.size) { in intel_gvt_scan_and_shadow_workload()
833 if (IS_BROADWELL(gvt->dev_priv) && rq->engine->id == RCS0) in update_guest_context()
1548 if (ring_id == RCS0) { in intel_vgpu_create_workload()
|
| D | execlist.c | 50 [RCS0] = RCS_AS_CONTEXT_SWITCH,
|
| D | cmd_parser.c | 410 #define R_RCS BIT(RCS0)
580 [RCS0] = {
980 if (IS_BROADWELL(gvt->dev_priv) && s->ring_id != RCS0) { in cmd_handler_lri()
1081 [RCS0] = {
|
| D | handlers.c | 326 engine_mask |= BIT(RCS0); in gdrst_mmio_write()
1756 id = RCS0; in gvt_reg_tlb_control_handler()
|
| /Linux-v5.4/drivers/gpu/drm/i915/ |
| D | i915_pci.c | 158 .engine_mask = BIT(RCS0), \
175 .engine_mask = BIT(RCS0), \
209 .engine_mask = BIT(RCS0), \
294 .engine_mask = BIT(RCS0), \
324 .engine_mask = BIT(RCS0) | BIT(VCS0),
334 .engine_mask = BIT(RCS0) | BIT(VCS0),
342 .engine_mask = BIT(RCS0) | BIT(VCS0), \
369 .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
417 .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
483 .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0),
[all …]
|
| D | i915_irq.c | 4044 intel_engine_breadcrumbs_irq(dev_priv->engine[RCS0]); in i8xx_irq_handler()
4149 intel_engine_breadcrumbs_irq(dev_priv->engine[RCS0]); in i915_irq_handler()
4291 intel_engine_breadcrumbs_irq(dev_priv->engine[RCS0]); in i965_irq_handler()
|
| D | i915_gpu_error.c | 1115 case RCS0: in error_record_engine_registers()
|
| /Linux-v5.4/drivers/gpu/drm/i915/selftests/ |
| D | mock_gem_device.c | 205 i915->engine[RCS0] = mock_engine(i915, "mock", RCS0); in mock_gem_device()
206 if (!i915->engine[RCS0]) in mock_gem_device()
213 if (mock_engine_init(i915->engine[RCS0])) in mock_gem_device()
226 mock_engine_free(i915->engine[RCS0]); in mock_gem_device()
|
| D | i915_request.c | 49 request = mock_request(i915->engine[RCS0]->kernel_context, HZ / 10); in igt_add_request()
71 request = mock_request(i915->engine[RCS0]->kernel_context, T); in igt_wait_request()
144 request = mock_request(i915->engine[RCS0]->kernel_context, T); in igt_fence_wait()
202 ce = i915_gem_context_get_engine(ctx[0], RCS0); in igt_request_rewind()
215 ce = i915_gem_context_get_engine(ctx[1], RCS0); in igt_request_rewind()
433 .engine = i915->engine[RCS0], in mock_breadcrumbs_smoketest()
|
| /Linux-v5.4/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_coherency.c | 199 rq = i915_request_create(i915->engine[RCS0]->kernel_context); in gpu_set()
257 if (!HAS_ENGINE(i915, RCS0)) in needs_mi_store_dword()
260 return intel_engine_can_store_dword(i915->engine[RCS0]); in needs_mi_store_dword()
|
| D | i915_gem_context.c | 911 struct intel_engine_cs *engine = i915->engine[RCS0]; in __igt_ctx_sseu()
963 ce = i915_gem_context_get_engine(ctx, RCS0); in __igt_ctx_sseu()
1546 rq = igt_request_alloc(ctx, i915->engine[RCS0]); in mock_context_barrier()
1554 context_barrier_inject_fault = BIT(RCS0); in mock_context_barrier()
|
| /Linux-v5.4/drivers/gpu/drm/i915/gt/ |
| D | intel_engine_cs.c | 71 [RCS0] = {
963 if (engine->id != RCS0) in intel_engine_get_instdone()
981 if (engine->id != RCS0) in intel_engine_get_instdone()
997 if (engine->id == RCS0) in intel_engine_get_instdone()
|
| D | intel_engine_types.h | 140 RCS0 = 0, enumerator
|
| D | intel_engine_user.c | 156 [RENDER_CLASS] = { RCS0, 1 }, in legacy_ring_idx()
|
| D | intel_mocs.c | 329 case RCS0: in mocs_register()
|
| D | intel_reset.c | 287 [RCS0] = GEN6_GRDOM_RENDER, in gen6_reset_engines()
410 [RCS0] = GEN11_GRDOM_RENDER, in gen11_reset_engines()
|
| D | selftest_hangcheck.c | 1050 struct intel_engine_cs *engine = gt->i915->engine[RCS0]; in igt_reset_wait()
1186 struct intel_engine_cs *engine = gt->i915->engine[RCS0]; in __igt_reset_evict_vma()
1542 struct intel_engine_cs *engine = gt->i915->engine[RCS0]; in igt_handle_error()
|
| D | intel_ringbuffer.c | 549 case RCS0: in set_hwsp()
1783 GEM_BUG_ON(engine->id != RCS0); in switch_context()
|
| D | selftest_workarounds.c | 732 struct intel_engine_cs *engine = i915->engine[RCS0]; in live_reset_whitelist()
|
| D | intel_lrc.c | 3055 [RCS0] = GEN8_RCS_IRQ_SHIFT, in logical_ring_default_irqs()
|
| /Linux-v5.4/drivers/gpu/drm/i915/display/ |
| D | intel_overlay.c | 1353 if (!HAS_ENGINE(dev_priv, RCS0)) in intel_overlay_setup()
1361 overlay->context = dev_priv->engine[RCS0]->kernel_context; in intel_overlay_setup()
|
| /Linux-v5.4/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_execbuffer.c | 1940 if (!IS_GEN(rq->i915, 7) || rq->engine->id != RCS0) { in i915_reset_gen7_sol_offsets()
2130 [I915_EXEC_DEFAULT] = RCS0,
2131 [I915_EXEC_RENDER] = RCS0,
|
