Searched refs:RADEON_M_SPLL_REF_FB_DIV (Results 1 – 2 of 2) sorted by relevance
44 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_engine_clock()50 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_engine_clock()74 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_memory_clock()80 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_memory_clock()151 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_read_clocks_OF()215 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_get_clock_info()267 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_get_clock_info()359 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in calc_eng_mem_clock()421 tmp = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_set_engine_clock()424 WREG32_PLL(RADEON_M_SPLL_REF_FB_DIV, tmp); in radeon_legacy_set_engine_clock()
1647 #define RADEON_M_SPLL_REF_FB_DIV 0x000a /* PLL */ macro