Searched refs:PRCMU_DSI0ESCCLK (Results 1 – 5 of 5) sorted by relevance
70 #define PRCMU_DSI0ESCCLK 49 macro
228 PRCMU_DSI0ESCCLK, 0, CLK_SET_RATE_GATE); in u8500_clk_init()229 prcmu_clk[PRCMU_DSI0ESCCLK] = clk; in u8500_clk_init()
1458 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in db8500_prcmu_request_clock()1459 return request_dsiescclk((clock - PRCMU_DSI0ESCCLK), enable); in db8500_prcmu_request_clock()1634 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_clock_rate()1635 return dsiescclk_rate(clock - PRCMU_DSI0ESCCLK); in prcmu_clock_rate()1817 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_round_clock_rate()1989 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_set_clock_rate()1990 set_dsiescclk_rate((clock - PRCMU_DSI0ESCCLK), rate); in prcmu_set_clock_rate()
72 clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
1070 clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
