Searched refs:PP_SMU_RESULT_OK (Results 1 – 4 of 4) sorted by relevance
721 return PP_SMU_RESULT_OK; in pp_nv_set_wm_ranges()737 return PP_SMU_RESULT_OK; in pp_nv_set_pme_wa_enable()753 return PP_SMU_RESULT_OK; in pp_nv_set_display_count()769 return PP_SMU_RESULT_OK; in pp_nv_set_min_deep_sleep_dcfclk()792 return PP_SMU_RESULT_OK; in pp_nv_set_hard_min_dcefclk_by_freq()814 return PP_SMU_RESULT_OK; in pp_nv_set_hard_min_uclk_by_freq()827 return PP_SMU_RESULT_OK; in pp_nv_set_pstate_handshake_support()862 return PP_SMU_RESULT_OK; in pp_nv_set_voltage_by_freq()879 return PP_SMU_RESULT_OK; in pp_nv_get_maximum_sustainable_clocks()899 return PP_SMU_RESULT_OK; in pp_nv_get_uclk_dpm_states()
68 PP_SMU_RESULT_OK = 1, enumerator
1323 return PP_SMU_RESULT_OK; in dummy_set_wm_ranges()1330 return PP_SMU_RESULT_OK; in dummy_get_dpm_clock_table()
3281 uclk_states_available = (status == PP_SMU_RESULT_OK); in init_soc_bounding_box()3291 clock_limits_available = (status == PP_SMU_RESULT_OK); in init_soc_bounding_box()
