Searched refs:PLL_DIVR1_MASK (Results 1 – 1 of 1) sorted by relevance
27 #define PLL_DIVR1_MASK GENMASK(27, 25) macro344 divr1 = FIELD_GET(PLL_DIVR1_MASK, val); in clk_sccg_pll_recalc_rate()382 val &= ~(PLL_DIVR1_MASK | PLL_DIVR2_MASK | PLL_DIVQ_MASK); in clk_sccg_pll_set_rate()385 val |= FIELD_PREP(PLL_DIVR1_MASK, setup->divr1); in clk_sccg_pll_set_rate()
