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Searched refs:PLL_CFG0 (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.4/drivers/clk/imx/
Dclk-frac-pll.c20 #define PLL_CFG0 0x0 macro
69 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_prepare()
71 writel_relaxed(val, pll->base + PLL_CFG0); in clk_pll_prepare()
81 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_unprepare()
83 writel_relaxed(val, pll->base + PLL_CFG0); in clk_pll_unprepare()
91 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_is_prepared()
103 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_recalc_rate()
176 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_set_rate()
178 writel_relaxed(val, pll->base + PLL_CFG0); in clk_pll_set_rate()
181 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_set_rate()
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Dclk-sccg-pll.c21 #define PLL_CFG0 0x0 macro
105 val = readl_relaxed(pll->base + PLL_CFG0); in clk_sccg_pll_wait_lock()
309 u32 val = readl_relaxed(pll->base + PLL_CFG0); in clk_sccg_pll_is_prepared()
319 val = readl_relaxed(pll->base + PLL_CFG0); in clk_sccg_pll_prepare()
321 writel_relaxed(val, pll->base + PLL_CFG0); in clk_sccg_pll_prepare()
331 val = readl_relaxed(pll->base + PLL_CFG0); in clk_sccg_pll_unprepare()
333 writel_relaxed(val, pll->base + PLL_CFG0); in clk_sccg_pll_unprepare()
352 val = readl(pll->base + PLL_CFG0); in clk_sccg_pll_recalc_rate()
375 val = readl(pll->base + PLL_CFG0); in clk_sccg_pll_set_rate()
378 writel(val, pll->base + PLL_CFG0); in clk_sccg_pll_set_rate()
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