Searched refs:PLLD_BASE (Results 1 – 5 of 5) sorted by relevance
| /Linux-v5.4/drivers/clk/tegra/ |
| D | clk-tegra124.c | 49 #define PLLD_BASE 0xd0 macro
609 .base_reg = PLLD_BASE,
1457 plld_base = readl(clk_base + PLLD_BASE); in tegra124_132_clock_init_pre()
1459 writel(plld_base, clk_base + PLLD_BASE); in tegra124_132_clock_init_pre()
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| D | clk-tegra114.c | 65 #define PLLD_BASE 0xd0 macro
412 .base_reg = PLLD_BASE,
1047 clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock); in tegra114_periph_clk_init()
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| D | clk-tegra210.c | 69 #define PLLD_BASE 0xd0 macro
570 csi_src = readl_relaxed(clk_base + PLLD_BASE); in tegra210_venc_mbist_war()
571 writel_relaxed(csi_src | PLLD_BASE_CSI_CLKSOURCE, clk_base + PLLD_BASE); in tegra210_venc_mbist_war()
582 writel_relaxed(csi_src, clk_base + PLLD_BASE); in tegra210_venc_mbist_war()
2090 .base_reg = PLLD_BASE,
3572 value = readl(clk_base + PLLD_BASE); in tegra210_clock_init()
3574 writel(value, clk_base + PLLD_BASE); in tegra210_clock_init()
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| D | clk-tegra20.c | 54 #define PLLD_BASE 0xd0 macro
350 .base_reg = PLLD_BASE,
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| D | clk-tegra30.c | 63 #define PLLD_BASE 0xd0 macro
443 .base_reg = PLLD_BASE,
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