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Searched refs:PIPE_C (Results 1 – 19 of 19) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/i915/gvt/
Dhandlers.c635 calc_index(offset, _FDI_RXA_CTL, _FDI_RXB_CTL, 0, FDI_RX_CTL(PIPE_C))
638 calc_index(offset, _FDI_TXA_CTL, _FDI_TXB_CTL, 0, FDI_TX_CTL(PIPE_C))
641 calc_index(offset, _FDI_RXA_IMR, _FDI_RXB_IMR, 0, FDI_RX_IMR(PIPE_C))
749 calc_index(offset, _DSPASURF, _DSPBSURF, 0, DSPSURF(PIPE_C))
772 calc_index(offset, _SPRA_SURF, _SPRB_SURF, 0, SPRSURF(PIPE_C))
1961 MMIO_D(PIPEDSL(PIPE_C), D_ALL); in init_generic_mmio_info()
1966 MMIO_DH(PIPECONF(PIPE_C), D_ALL, NULL, pipeconf_mmio_write); in init_generic_mmio_info()
1971 MMIO_D(PIPESTAT(PIPE_C), D_ALL); in init_generic_mmio_info()
1976 MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_C), D_ALL); in init_generic_mmio_info()
1981 MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_C), D_ALL); in init_generic_mmio_info()
[all …]
Dreg.h76 (((p) == PIPE_C) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x5008C)) : \
84 (((reg) == 0x5008C || (reg) == 0x5009C) ? (PIPE_C) : \
Ddisplay.c52 pipe = PIPE_C; in get_edp_pipe()
397 [PIPE_C] = PIPE_C_VBLANK, in emulate_vblank_on_pipe()
401 if (pipe < PIPE_A || pipe > PIPE_C) in emulate_vblank_on_pipe()
Dcmd_parser.c1220 [4] = {PIPE_C, PLANE_A, PRIMARY_C_FLIP_DONE}, in gen8_decode_mi_display_flip()
1221 [5] = {PIPE_C, PLANE_B, SPRITE_C_FLIP_DONE}, in gen8_decode_mi_display_flip()
1279 info->pipe = PIPE_C; in skl_decode_mi_display_flip()
1294 info->pipe = PIPE_C; in skl_decode_mi_display_flip()
Dinterrupt.c451 DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(de_pipe_c, GEN8_DE_PIPE_ISR(PIPE_C));
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_trace.h46 __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
73 __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
170 __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
Dintel_device_info.c871 runtime->num_scalers[PIPE_C] = 1; in intel_device_info_runtime_init()
894 runtime->num_sprites[PIPE_C] = 1; in intel_device_info_runtime_init()
940 enabled_mask &= ~BIT(PIPE_C); in intel_device_info_runtime_init()
Di915_pci.c111 [PIPE_C] = CHV_CURSOR_C_OFFSET, \
118 [PIPE_C] = IVB_CURSOR_C_OFFSET, \
Dintel_pm.c515 case PIPE_C: in vlv_get_fifo_size()
1024 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) | in vlv_write_wm_values()
1025 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE)); in vlv_write_wm_values()
1027 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) | in vlv_write_wm_values()
1028 FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC)); in vlv_write_wm_values()
1031 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) | in vlv_write_wm_values()
1032 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) | in vlv_write_wm_values()
1033 FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) | in vlv_write_wm_values()
1916 wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1; in vlv_compute_pipe_wm()
2026 case PIPE_C: in vlv_atomic_update_fifo()
[all …]
Di915_irq.c1750 case PIPE_C: in i9xx_pipestat_irq_ack()
/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_pipe_crc.c185 case PIPE_C: in vlv_pipe_crc_ctl_reg()
249 case PIPE_C: in vlv_undo_pipe_scramble_reset()
Dintel_display.h84 PIPE_C, enumerator
102 TRANSCODER_C = PIPE_C,
Dintel_display_power.c1407 pipe = PIPE_C; in chv_dpio_cmn_power_well_enable()
1468 assert_pll_disabled(dev_priv, PIPE_C); in chv_dpio_cmn_power_well_disable()
1488 enum pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C; in assert_chv_phy_powergate()
2750 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
2951 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3033 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3093 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3262 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3583 .hsw.irq_pipe_mask = BIT(PIPE_C),
3900 .hsw.irq_pipe_mask = BIT(PIPE_C),
Dicl_dsi.c745 case PIPE_C: in gen11_dsi_configure_transcoder()
1326 *pipe = PIPE_C; in gen11_dsi_get_hw_state()
1587 encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); in icl_dsi_init()
Dintel_sprite.c2361 if (IS_GEN(dev_priv, 9) && !IS_GEMINILAKE(dev_priv) && pipe == PIPE_C) in skl_plane_has_planar()
2422 return pipe != PIPE_C; in skl_plane_has_ccs()
2424 return pipe != PIPE_C && in skl_plane_has_ccs()
Dintel_display_types.h1330 case PIPE_C: in vlv_pipe_to_channel()
Dvlv_dsi.c1011 if (WARN_ON(tmp > PIPE_C)) in intel_dsi_get_hw_state()
1873 intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); in vlv_dsi_init()
Dintel_ddi.c1818 case PIPE_C: in intel_ddi_enable_transcoder_func()
2007 *pipe_mask = BIT(PIPE_C); in intel_ddi_get_encoder_pipes()
Dintel_display.c5140 WARN_ON(I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLE); in cpt_set_fdi_bc_bifurcation()
5166 case PIPE_C: in ivybridge_update_fdi_bc_bifurcation()
7218 other_crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_C); in ironlake_check_fdi_lanes()
7230 case PIPE_C: in ironlake_check_fdi_lanes()
8177 (pipe == PIPE_B || pipe == PIPE_C)) in intel_set_pipe_timings()
10265 trans_pipe = PIPE_C; in hsw_get_transcoder_state()
10917 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_C && in i9xx_check_cursor()