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Searched refs:PINMUX_CFG_REG (Results 1 – 25 of 32) sorted by relevance

12

/Linux-v5.4/drivers/pinctrl/sh-pfc/
Dpfc-sh7264.c1469 { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1, GROUP(
1479 { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4, GROUP(
1490 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4, GROUP(
1500 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4, GROUP(
1510 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4, GROUP(
1520 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4, GROUP(
1530 { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4, GROUP(
1541 { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1, GROUP(
1554 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1, GROUP(
1573 { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4, GROUP(
[all …]
Dpfc-sh7203.c1076 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1, GROUP(
1094 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4, GROUP(
1104 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4, GROUP(
1117 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4, GROUP(
1130 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4, GROUP(
1143 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4, GROUP(
1153 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1, GROUP(
1171 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4, GROUP(
1183 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4, GROUP(
1196 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4, GROUP(
[all …]
Dpfc-sh7269.c1954 { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1, GROUP(
1960 { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4, GROUP(
1974 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4, GROUP(
1991 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4, GROUP(
2007 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4, GROUP(
2020 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4, GROUP(
2033 { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4, GROUP(
2046 { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1, GROUP(
2058 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1, GROUP(
2077 { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4, GROUP(
[all …]
Dpfc-sh7722.c1240 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1250 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1260 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1270 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1280 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1290 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1300 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1310 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1320 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1330 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7757.c1686 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2, GROUP(
1696 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2, GROUP(
1706 { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2, GROUP(
1716 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2, GROUP(
1726 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2, GROUP(
1736 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2, GROUP(
1746 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2, GROUP(
1756 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2, GROUP(
1766 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2, GROUP(
1776 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2, GROUP(
[all …]
Dpfc-sh7720.c928 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
938 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
948 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
958 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
968 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
978 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
988 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
998 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1008 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1018 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7785.c988 { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2, GROUP(
998 { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2, GROUP(
1008 { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2, GROUP(
1018 { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2, GROUP(
1028 { PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2, GROUP(
1038 { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2, GROUP(
1048 { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2, GROUP(
1058 { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2, GROUP(
1068 { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2, GROUP(
1078 { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2, GROUP(
[all …]
Dpfc-sh7723.c1510 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1520 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1530 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1540 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1550 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1560 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1570 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1580 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1590 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1600 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7724.c1742 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1752 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1762 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1772 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1782 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1792 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1802 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1812 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1822 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1832 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7786.c630 { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2, GROUP(
640 { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2, GROUP(
650 { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2, GROUP(
660 { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2, GROUP(
670 { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2, GROUP(
680 { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2, GROUP(
690 { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2, GROUP(
700 { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2, GROUP(
710 { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2, GROUP(
720 { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1, GROUP(
[all …]
Dpfc-r8a77995.c2378 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
2412 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
2446 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
2480 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
2514 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
2548 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
2582 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
2621 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
2631 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
2641 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
[all …]
Dpfc-r8a77970.c2055 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
2089 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
2123 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
2157 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
2191 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
2225 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
2264 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
2274 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
2284 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
2294 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP(
[all …]
Dpfc-r8a7792.c1991 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP(
2025 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP(
2059 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP(
2093 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP(
2127 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP(
2161 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP(
2195 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1, GROUP(
2229 { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1, GROUP(
2263 { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1, GROUP(
2297 { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1, GROUP(
[all …]
Dpfc-r8a77980.c2477 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
2511 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
2545 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
2579 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
2613 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
2647 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
2686 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
2696 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
2706 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
2716 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP(
[all …]
Dpfc-shx3.c434 { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2, GROUP(
452 { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2, GROUP(
470 { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2, GROUP(
488 { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2, GROUP(
Dpfc-r8a7795-es1.c4752 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
4786 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
4820 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
4854 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
4888 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
4922 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
4956 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
4990 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1, GROUP(
5029 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5039 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
[all …]
Dpfc-r8a77990.c4522 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
4556 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
4590 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
4624 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
4658 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
4692 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
4726 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
4765 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
4775 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
4785 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
[all …]
Dpfc-r8a7796.c5065 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
5099 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
5133 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
5167 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
5201 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
5235 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
5269 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
5303 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1, GROUP(
5342 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5352 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
[all …]
Dpfc-r8a77965.c5305 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
5339 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
5373 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
5407 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
5441 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
5475 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
5509 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
5543 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1, GROUP(
5582 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5592 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
[all …]
Dpfc-r8a7795.c5097 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
5131 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
5165 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
5199 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
5233 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
5267 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
5301 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
5335 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1, GROUP(
5374 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5384 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
[all …]
Dpfc-sh7734.c1638 { PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1, GROUP(
1672 { PINMUX_CFG_REG("GPSR1", 0xFFFC0008, 32, 1, GROUP(
1706 { PINMUX_CFG_REG("GPSR2", 0xFFFC000C, 32, 1, GROUP(
1740 { PINMUX_CFG_REG("GPSR3", 0xFFFC0010, 32, 1, GROUP(
1775 { PINMUX_CFG_REG("GPSR4", 0xFFFC0014, 32, 1, GROUP(
1809 { PINMUX_CFG_REG("GPSR5", 0xFFFC0018, 32, 1, GROUP(
2396 { PINMUX_CFG_REG("INOUTSEL0", 0xFFC40004, 32, 1, GROUP(GP_INOUTSEL(0)))
2398 { PINMUX_CFG_REG("INOUTSEL1", 0xFFC41004, 32, 1, GROUP(GP_INOUTSEL(1)))
2400 { PINMUX_CFG_REG("INOUTSEL2", 0xFFC42004, 32, 1, GROUP(GP_INOUTSEL(2)))
2402 { PINMUX_CFG_REG("INOUTSEL3", 0xFFC43004, 32, 1, GROUP(GP_INOUTSEL(3)))
[all …]
Dpfc-emev2.c1434 { PINMUX_CFG_REG("GPSR0", 0xe0140200, 32, 1, GROUP(
1469 { PINMUX_CFG_REG("GPSR1", 0xe0140204, 32, 1, GROUP(
1504 { PINMUX_CFG_REG("GPSR2", 0xe0140208, 32, 1, GROUP(
1539 { PINMUX_CFG_REG("GPSR3", 0xe014020c, 32, 1, GROUP(
1574 { PINMUX_CFG_REG("GPSR4", 0xe0140210, 32, 1, GROUP(
Dpfc-r8a73a4.c2287 { PINMUX_CFG_REG("MSEL1CR", 0xe605800c, 32, 1, GROUP(
2322 { PINMUX_CFG_REG("MSEL3CR", 0xe6058020, 32, 1, GROUP(
2357 { PINMUX_CFG_REG("MSEL4CR", 0xe6058024, 32, 1, GROUP(
2392 { PINMUX_CFG_REG("MSEL5CR", 0xe6058028, 32, 1, GROUP(
2427 { PINMUX_CFG_REG("MSEL8CR", 0xe6058034, 32, 1, GROUP(
Dpfc-r8a77470.c2544 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP(
2578 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP(
2612 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP(
2646 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP(
2680 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP(
2714 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP(
Dpfc-r8a7779.c3157 { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1, GROUP(
3191 { PINMUX_CFG_REG("GPSR1", 0xfffc0008, 32, 1, GROUP(
3225 { PINMUX_CFG_REG("GPSR2", 0xfffc000c, 32, 1, GROUP(
3259 { PINMUX_CFG_REG("GPSR3", 0xfffc0010, 32, 1, GROUP(
3293 { PINMUX_CFG_REG("GPSR4", 0xfffc0014, 32, 1, GROUP(
3327 { PINMUX_CFG_REG("GPSR5", 0xfffc0018, 32, 1, GROUP(
3361 { PINMUX_CFG_REG("GPSR6", 0xfffc001c, 32, 1, GROUP(

12