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Searched refs:PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dexynos7-clk.h136 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/Linux-v5.4/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi609 <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,
/Linux-v5.4/drivers/clk/samsung/
Dclk-exynos7.c946 GATE(PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,