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Searched refs:PFIT_CONTROL (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/gma500/
Doaktrail_lvds.c129 REG_WRITE(PFIT_CONTROL, 0); in oaktrail_lvds_mode_set()
135 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
139 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | in oaktrail_lvds_mode_set()
142 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | in oaktrail_lvds_mode_set()
145 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
147 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
Dpsb_intel_lvds.c268 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL); in psb_intel_lvds_save()
309 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL); in psb_intel_lvds_restore()
485 REG_WRITE(PFIT_CONTROL, pfit_control); in psb_intel_lvds_mode_set()
Dmdfld_device.c211 regs->savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); in mdfld_save_display_registers()
339 PSB_WVDC32(regs->savePFIT_CONTROL, PFIT_CONTROL); in mdfld_restore_display_registers()
Dpsb_intel_display.c82 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()
208 REG_WRITE(PFIT_CONTROL, 0); in psb_intel_crtc_mode_set()
Doaktrail_device.c239 regs->psb.savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); in oaktrail_save_display_registers()
363 PSB_WVDC32(regs->psb.savePFIT_CONTROL, PFIT_CONTROL); in oaktrail_restore_display_registers()
Dcdv_device.c284 regs->cdv.savePFIT_CONTROL = REG_READ(PFIT_CONTROL); in cdv_save_display_registers()
351 REG_WRITE(PFIT_CONTROL, regs->cdv.savePFIT_CONTROL); in cdv_restore_display_registers()
Doaktrail_crtc.c346 pfit_control = REG_READ(PFIT_CONTROL); in oaktrail_panel_fitter_pipe()
417 REG_WRITE(PFIT_CONTROL, 0); in oaktrail_crtc_mode_set()
Dcdv_intel_display.c560 pfit_control = REG_READ(PFIT_CONTROL); in cdv_intel_panel_fitter_pipe()
766 REG_WRITE(PFIT_CONTROL, 0); in cdv_intel_crtc_mode_set()
Dmdfld_intel_display.c106 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()
757 REG_WRITE(PFIT_CONTROL, 0); in mdfld_crtc_mode_set()
Dcdv_intel_lvds.c372 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_lvds_mode_set()
Dpsb_intel_reg.h205 #define PFIT_CONTROL 0x61230 macro
Dcdv_intel_dp.c1103 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_dp_mode_set()
/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_lvds.c146 tmp = I915_READ(PFIT_CONTROL); in intel_lvds_get_config()
Dintel_overlay.c890 u32 pfit_control = I915_READ(PFIT_CONTROL); in update_pfit_vscale_ratio()
Dintel_display.c6670 WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE); in i9xx_pfit_enable()
6674 I915_WRITE(PFIT_CONTROL, crtc_state->gmch_pfit.control); in i9xx_pfit_enable()
6979 I915_READ(PFIT_CONTROL)); in i9xx_pfit_disable()
6980 I915_WRITE(PFIT_CONTROL, 0); in i9xx_pfit_disable()
8544 tmp = I915_READ(PFIT_CONTROL); in i9xx_get_pfit_config()
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_reg.h4771 #define PFIT_CONTROL _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61230) macro