| /Linux-v5.4/include/dt-bindings/clock/ |
| D | s3c2412.h | 41 #define PCLK_WDT 32 macro
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| D | s3c2443.h | 79 #define PCLK_WDT 83 macro
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| D | samsung,s3c64xx-clock.h | 84 #define PCLK_WDT 69 macro
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| D | rk3036-cru.h | 77 #define PCLK_WDT 368 macro
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| D | exynos7-clk.h | 125 #define PCLK_WDT 3 macro
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| D | rk3188-cru-common.h | 83 #define PCLK_WDT 331 macro
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| D | rk3128-cru.h | 92 #define PCLK_WDT 319 macro
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| D | rv1108-cru.h | 135 #define PCLK_WDT 284 macro
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| D | rk3368-cru.h | 149 #define PCLK_WDT 368 macro
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| D | rk3288-cru.h | 160 #define PCLK_WDT 368 macro
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| D | rk3308-cru.h | 193 #define PCLK_WDT 214 macro
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| D | rk3328-cru.h | 167 #define PCLK_WDT 236 macro
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| D | rk3399-cru.h | 275 #define PCLK_WDT 380 macro
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | s3c2416.dtsi | 104 clocks = <&clocks PCLK_WDT>;
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| D | s3c64xx.dtsi | 101 clocks = <&clocks PCLK_WDT>;
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| D | rk3xxx.dtsi | 344 clocks = <&cru PCLK_WDT>;
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| /Linux-v5.4/drivers/clk/samsung/ |
| D | clk-s3c2443.c | 131 GATE(PCLK_WDT, "wdt", "pclk", PCLKCON, 11, 0, 0),
162 ALIAS(PCLK_WDT, NULL, "watchdog"),
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| D | clk-s3c64xx.c | 239 GATE_BUS(PCLK_WDT, "pclk_wdt", "pclk", PCLK_GATE, 5),
344 ALIAS(PCLK_WDT, NULL, "watchdog"),
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| D | clk-s3c2412.c | 105 GATE(PCLK_WDT, "wdt", "pclk", CLKCON, 28, 0, 0),
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| /Linux-v5.4/drivers/clk/rockchip/ |
| D | clk-rk3036.c | 414 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
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| D | clk-rk3128.c | 511 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
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| D | clk-rv1108.c | 631 GATE(PCLK_WDT, "pclk_wdt", "pclk_bus_pre", 0,
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| D | clk-rk3188.c | 518 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
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| D | clk-rk3328.c | 795 SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_bus"),
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| /Linux-v5.4/arch/arm64/boot/dts/exynos/ |
| D | exynos7.dtsi | 520 clocks = <&clock_peris PCLK_WDT>;
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