| /Linux-v5.4/arch/arm/boot/dts/ |
| D | s3c2416.dtsi | 75 clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
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| D | s3c64xx.dtsi | 159 clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
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| D | rk3xxx.dtsi | 428 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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| D | rk3288.dtsi | 460 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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| /Linux-v5.4/include/dt-bindings/clock/ |
| D | s3c2443.h | 71 #define PCLK_UART3 75 macro
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| D | samsung,s3c64xx-clock.h | 85 #define PCLK_UART3 70 macro
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| D | exynos7-clk.h | 95 #define PCLK_UART3 3 macro
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| D | rk3188-cru-common.h | 87 #define PCLK_UART3 335 macro
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| D | px30-cru.h | 152 #define PCLK_UART3 331 macro
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| D | rk3368-cru.h | 127 #define PCLK_UART3 344 macro
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| D | rk3288-cru.h | 136 #define PCLK_UART3 344 macro
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| D | rk3308-cru.h | 179 #define PCLK_UART3 200 macro
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| D | rk3399-cru.h | 250 #define PCLK_UART3 355 macro
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| /Linux-v5.4/drivers/clk/samsung/ |
| D | clk-s3c2443.c | 138 GATE(PCLK_UART3, "uart3", "pclk", PCLKCON, 3, 0, 0),
154 ALIAS(PCLK_UART3, "s3c2440-uart.3", "uart"),
158 ALIAS(PCLK_UART3, "s3c2440-uart.3", "clk_uart_baud2"),
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| D | clk-s3c64xx.c | 240 GATE_BUS(PCLK_UART3, "pclk_uart3", "pclk", PCLK_GATE, 4),
345 ALIAS(PCLK_UART3, "s3c6400-uart.3", "uart"),
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| D | clk-exynos7.c | 754 GATE(PCLK_UART3, "pclk_uart3", "mout_aclk_peric1_66_user",
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| /Linux-v5.4/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 522 GATE(PCLK_UART3, "pclk_uart3", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 3, GFLAGS),
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| D | clk-rk3368.c | 795 GATE(PCLK_UART3, "pclk_uart3", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 9, GFLAGS),
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| D | clk-rk3288.c | 738 GATE(PCLK_UART3, "pclk_uart3", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 11, GFLAGS),
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| D | clk-px30.c | 811 GATE(PCLK_UART3, "pclk_uart3", "pclk_bus_pre", 0, PX30_CLKGATE_CON(14), 7, GFLAGS),
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| D | clk-rk3308.c | 868 GATE(PCLK_UART3, "pclk_uart3", "pclk_bus", 0, RK3308_CLKGATE_CON(5), 13, GFLAGS),
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| D | clk-rk3399.c | 1030 GATE(PCLK_UART3, "pclk_uart3", "pclk_perilp1", 0, RK3399_CLKGATE_CON(22), 3, GFLAGS),
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| /Linux-v5.4/arch/arm64/boot/dts/exynos/ |
| D | exynos7.dtsi | 273 clocks = <&clock_peric1 PCLK_UART3>,
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| /Linux-v5.4/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 380 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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| D | px30.dtsi | 418 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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