Searched refs:PCI_PM_CTRL_STATE_MASK (Results 1 – 15 of 15) sorted by relevance
632 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) { in apple_airport_reset()633 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in apple_airport_reset()638 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) { in apple_airport_reset()
125 new_state = (pci_power_t)(new_value & PCI_PM_CTRL_STATE_MASK); in pm_ctrl_write()
754 csr &= ~PCI_PM_CTRL_STATE_MASK; in _ish_hw_reset()760 csr &= ~PCI_PM_CTRL_STATE_MASK; in _ish_hw_reset()
338 dev->current_state = (pci_power_t __force)(pmcsr & PCI_PM_CTRL_STATE_MASK); in mid_power_off_one_device()
864 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in pci_raw_set_power_state()870 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot in pci_raw_set_power_state()892 dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); in pci_raw_set_power_state()940 dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); in pci_update_current_state()1678 dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); in pci_enable_device_flags()4596 csr &= ~PCI_PM_CTRL_STATE_MASK; in pci_pm_reset()4601 csr &= ~PCI_PM_CTRL_STATE_MASK; in pci_pm_reset()
2200 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) in quirk_e100_interrupt()
252 #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ macro
675 switch (le32_to_cpu(val) & PCI_PM_CTRL_STATE_MASK) { in vfio_pm_config_write()715 p_setd(perm, PCI_PM_CTRL, NO_VIRT, ~PCI_PM_CTRL_STATE_MASK); in init_pci_cap_pm_perm()
586 d3_state = ((pmcsr & PCI_PM_CTRL_STATE_MASK) == in telem_soc_states_show()
3171 ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) | in bnx2x_set_power_state()3174 if (pmcsr & PCI_PM_CTRL_STATE_MASK) in bnx2x_set_power_state()3188 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in bnx2x_set_power_state()
1482 (!rc && ((pm & PCI_PM_CTRL_STATE_MASK) != (__force u16)PCI_D0))) in bnx2x_is_nvm_accessible()
830 if (tmp & PCI_PM_CTRL_STATE_MASK) { in natsemi_probe1()832 u32 newtmp = tmp & ~PCI_PM_CTRL_STATE_MASK; in natsemi_probe1()
2531 pwr_cmd = (pwr_cmd & ~PCI_PM_CTRL_STATE_MASK) | state; in radeonfb_whack_power_state()
3515 data &= ~PCI_PM_CTRL_STATE_MASK; in hw_cfg_wol_pme()
16547 pm_reg &= ~PCI_PM_CTRL_STATE_MASK; in tg3_get_invariants()