Searched refs:PCH_DPLL_SEL (Results 1 – 3 of 3) sorted by relevance
5239 temp = I915_READ(PCH_DPLL_SEL); in ironlake_pch_enable()5247 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_pch_enable()6611 temp = I915_READ(PCH_DPLL_SEL); in ironlake_crtc_disable()6613 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_crtc_disable()10013 tmp = I915_READ(PCH_DPLL_SEL); in ironlake_get_pipe_config()
2284 MMIO_D(PCH_DPLL_SEL, D_ALL); in init_generic_mmio_info()
8116 #define PCH_DPLL_SEL _MMIO(0xc7000) macro
