Searched refs:PB5 (Results 1 – 15 of 15) sorted by relevance
24 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
24 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
107 pins = "PB5";
75 interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */
634 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */663 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
433 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */457 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
355 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
87 - GP21 MDT2005 PB5 pin 11
332 #define PB5 21 macro
299 PINMUX_GPIO(PB5),
421 PINMUX_GPIO(PB5),
685 PINMUX_GPIO(PB5),
721 PINMUX_GPIO(PB5),
1096 PINMUX_GPIO(PB5),
1474 PINMUX_GPIO(PB5),
