Searched refs:PANEL_POWER_CYCLE_DELAY_MASK (Results 1 – 5 of 5) sorted by relevance
172 val = REG_FIELD_GET(PANEL_POWER_CYCLE_DELAY_MASK, val); in intel_lvds_pps_get_hw_state()223 REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, in intel_lvds_pps_init_hw()
6406 seq->t11_t12 = REG_FIELD_GET(PANEL_POWER_CYCLE_DELAY_MASK, pp_div) * 1000; in intel_pps_readout_hw_state()6605 REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_ROUND_UP(seq->t11_t12, 1000))); in intel_dp_init_panel_power_sequencer_registers()
202 #define PANEL_POWER_CYCLE_DELAY_MASK (0x1f) macro
2097 cur.t11_t12 = ((pp_div & PANEL_POWER_CYCLE_DELAY_MASK) >> in cdv_intel_dp_init()
4768 #define PANEL_POWER_CYCLE_DELAY_MASK REG_GENMASK(4, 0) macro
