Searched refs:PACKET3_SET_CONTEXT_REG_START (Results 1 – 18 of 18) sorted by relevance
264 #define PACKET3_SET_CONTEXT_REG_START 0x000a000 macro
274 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
266 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
345 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
463 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
2562 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()2570 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()3992 buffer[count++] = cpu_to_le32(ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()4002 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()
942 PACKET3_SET_CONTEXT_REG_START); in gfx_v10_0_get_csb_buffer()952 SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START; in gfx_v10_0_get_csb_buffer()2693 PACKET3_SET_CONTEXT_REG_START); in gfx_v10_0_cp_gfx_start()2701 SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START; in gfx_v10_0_cp_gfx_start()
1849 #define PACKET3_SET_CONTEXT_REG_START 0x000a000 macro
1267 PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_get_csb_buffer()1278 PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_get_csb_buffer()4229 ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()4237 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()
2067 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v6_0_cp_gfx_start()2911 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v6_0_get_csb_buffer()
1477 PACKET3_SET_CONTEXT_REG_START); in gfx_v9_0_get_csb_buffer()3172 ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v9_0_cp_gfx_start()
2318 start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_START; in evergreen_packet3_check()2320 if ((start_reg < PACKET3_SET_CONTEXT_REG_START) || in evergreen_packet3_check()2629 allowed_reg_base -= PACKET3_SET_CONTEXT_REG_START; in evergreen_packet3_check()3504 allowed_reg_base -= PACKET3_SET_CONTEXT_REG_START; in evergreen_vm_packet3_check()
1273 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
1786 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
1929 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
1669 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
5748 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in si_get_csb_buffer()
6747 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in cik_get_csb_buffer()
