Home
last modified time | relevance | path

Searched refs:Op2 (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.4/arch/arm/kvm/
Dcoproc.c381 { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32,
385 { CRn( 0), CRm( 0), Op1( 2), Op2( 0), is32,
389 { CRn( 1), CRm( 0), Op1( 0), Op2( 1), is32,
393 { CRn( 1), CRm( 0), Op1( 0), Op2( 2), is32,
398 { CRn(2), CRm( 0), Op1( 0), Op2( 0), is32,
400 { CRn(2), CRm( 0), Op1( 0), Op2( 1), is32,
402 { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32,
408 { CRn( 3), CRm( 0), Op1( 0), Op2( 0), is32,
412 { CRn( 5), CRm( 0), Op1( 0), Op2( 0), is32,
414 { CRn( 5), CRm( 0), Op1( 0), Op2( 1), is32,
[all …]
Dcoproc.h14 unsigned long Op2; member
26 unsigned long Op2; member
54 p->CRn, p->CRm, p->Op1, p->Op2, in print_cp_instr()
112 if (i1->Op2 != i2->Op2) in cmp_reg()
113 return i1->Op2 - i2->Op2; in cmp_reg()
122 #define Op2(_x) .Op2 = _x macro
Dtrace.h13 unsigned long CRm, unsigned long Op2, bool is_write),
14 TP_ARGS(Op1, Rt1, CRn, CRm, Op2, is_write),
21 __field( unsigned int, Op2 )
31 __entry->Op2 = Op2;
37 __entry->CRm, __entry->Op2)
Dcoproc_a15.c24 { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
Dcoproc_a7.c27 { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
/Linux-v5.4/arch/arm64/kvm/
Dsys_regs.c268 switch (p->Op2) { in access_gic_sgi()
318 (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); in trap_loregion()
734 if (!(p->Op2 & 1)) in access_pmceid()
768 if (r->Op2 == 2) { in access_pmu_evcntr()
775 } else if (r->Op2 == 0) { in access_pmu_evcntr()
795 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evcntr()
826 if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) { in access_pmu_evtyper()
831 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evtyper()
869 if (r->Op2 & 0x1) { in access_pmcnten()
902 if (r->Op2 & 0x1) in access_pminten()
[all …]
Dsys_regs.h19 u8 Op2; member
35 u8 Op2; member
69 p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); in print_sys_reg_instr()
135 return i1->Op2 - i2->Op2; in cmp_sys_reg()
147 #define Op2(_x) .Op2 = _x macro
153 Op2(sys_reg_Op2(reg))
Dtrace.h168 __field(u8, Op2)
180 __entry->Op2 = reg->Op2;
186 __entry->CRm, __entry->Op2,
Dsys_regs_generic_v8.c49 { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
Dvgic-sys-reg-v3.c203 u8 idx = r->Op2 & 3; in access_gic_aprn()
/Linux-v5.4/arch/arm/include/asm/
Dcp15.h53 #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ argument
54 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
/Linux-v5.4/Documentation/virt/kvm/devices/
Darm-vgic-v3.txt171 | Op 0 | Op1 | CRn | CRm | Op2 |