Home
last modified time | relevance | path

Searched refs:OD8_SETTING_GFXCLK_FREQ2 (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/
Dvega20_ppt.h144 OD8_SETTING_GFXCLK_FREQ2, enumerator
Dvega20_ppt.c1107 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].feature_id && in vega20_print_clk_levels()
1150 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].feature_id && in vega20_print_clk_levels()
1162 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].min_value, in vega20_print_clk_levels()
1163 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].max_value); in vega20_print_clk_levels()
1552 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].feature_id = in vega20_set_default_od8_setttings()
1566 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].default_value = in vega20_set_default_od8_setttings()
2461 case OD8_SETTING_GFXCLK_FREQ2: in vega20_update_specified_od8_value()
2724 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].feature_id && in vega20_odn_edit_dpm_table()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega20_hwmgr.c1125 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].feature_id = in vega20_od8_set_feature_id()
1138 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].feature_id = in vega20_od8_set_feature_id()
1253 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].default_value = in vega20_od8_initialize_default_settings()
1284 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].default_value = in vega20_od8_initialize_default_settings()
1395 case OD8_SETTING_GFXCLK_FREQ2: in vega20_od8_set_settings()
3008 od8_settings[OD8_SETTING_GFXCLK_FREQ2].feature_id && in vega20_odn_edit_dpm_table()
3409 od8_settings[OD8_SETTING_GFXCLK_FREQ2].feature_id && in vega20_print_clock_levels()
3445 od8_settings[OD8_SETTING_GFXCLK_FREQ2].feature_id && in vega20_print_clock_levels()
3457 od8_settings[OD8_SETTING_GFXCLK_FREQ2].min_value, in vega20_print_clock_levels()
3458 od8_settings[OD8_SETTING_GFXCLK_FREQ2].max_value); in vega20_print_clock_levels()
Dvega20_hwmgr.h408 OD8_SETTING_GFXCLK_FREQ2, enumerator