Searched refs:NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G (Results 1 – 3 of 3) sorted by relevance
1547 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G; in qed_set_link()1705 if (capability & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G) in qed_fill_link_capability()1765 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G) { in qed_fill_link_capability()1795 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G) in qed_fill_link_capability()
2063 *p_speed_mask = NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G | in qed_mcp_trans_speed_mask()2093 *p_speed_mask = NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G | in qed_mcp_trans_speed_mask()2102 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G | in qed_mcp_trans_speed_mask()2113 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G | in qed_mcp_trans_speed_mask()2118 *p_speed_mask = NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G; in qed_mcp_trans_speed_mask()
13261 #define NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G 0x10 macro
