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Searched refs:MemoryLevel (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dci_smumgr.c1307 …_t level_array_address = smu_data->dpm_table_start + offsetof(SMU7_Discrete_DpmTable, MemoryLevel); in ci_populate_all_memory_levels()
1309 SMU7_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel; in ci_populate_all_memory_levels()
1318 &(smu_data->smc_state_table.MemoryLevel[i])); in ci_populate_all_memory_levels()
1323 smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; in ci_populate_all_memory_levels()
1329 smu_data->smc_state_table.MemoryLevel[1].MinVddci = in ci_populate_all_memory_levels()
1330 smu_data->smc_state_table.MemoryLevel[0].MinVddci; in ci_populate_all_memory_levels()
1331 smu_data->smc_state_table.MemoryLevel[1].MinMvdd = in ci_populate_all_memory_levels()
1332 smu_data->smc_state_table.MemoryLevel[0].MinMvdd; in ci_populate_all_memory_levels()
1334 smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F; in ci_populate_all_memory_levels()
1335 CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel); in ci_populate_all_memory_levels()
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Dtonga_smumgr.c1097 offsetof(SMU72_Discrete_DpmTable, MemoryLevel); in tonga_populate_all_memory_levels()
1102 smu_data->smc_state_table.MemoryLevel; in tonga_populate_all_memory_levels()
1114 &(smu_data->smc_state_table.MemoryLevel[i])); in tonga_populate_all_memory_levels()
1120 smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; in tonga_populate_all_memory_levels()
1127 smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F; in tonga_populate_all_memory_levels()
1128 CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel); in tonga_populate_all_memory_levels()
1133 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in tonga_populate_all_memory_levels()
1242 smu_data->smc_state_table.MemoryLevel[0].MinVoltage; in tonga_populate_smc_acpi_level()
3158 offsetof(SMU72_Discrete_DpmTable, MemoryLevel); in tonga_update_dpm_settings()
3160 smu_data->smc_state_table.MemoryLevel; in tonga_update_dpm_settings()
Diceland_smumgr.c1354 …rray_adress = smu_data->smu7_data.dpm_table_start + offsetof(SMU71_Discrete_DpmTable, MemoryLevel); in iceland_populate_all_memory_levels()
1356 SMU71_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel; in iceland_populate_all_memory_levels()
1365 &(smu_data->smc_state_table.MemoryLevel[i])); in iceland_populate_all_memory_levels()
1372 smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; in iceland_populate_all_memory_levels()
1379 smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F; in iceland_populate_all_memory_levels()
1380 CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel); in iceland_populate_all_memory_levels()
1385 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in iceland_populate_all_memory_levels()
Dpolaris10_smumgr.c154 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, MemoryLevel); in polaris10_setup_graphics_level_structure()
1132 offsetof(SMU74_Discrete_DpmTable, MemoryLevel); in polaris10_populate_all_memory_levels()
1136 smu_data->smc_state_table.MemoryLevel; in polaris10_populate_all_memory_levels()
2475 offsetof(SMU74_Discrete_DpmTable, MemoryLevel); in polaris10_update_dpm_settings()
2477 smu_data->smc_state_table.MemoryLevel; in polaris10_update_dpm_settings()
Dfiji_smumgr.c1231 offsetof(SMU73_Discrete_DpmTable, MemoryLevel); in fiji_populate_all_memory_levels()
1235 smu_data->smc_state_table.MemoryLevel; in fiji_populate_all_memory_levels()
2562 offsetof(SMU73_Discrete_DpmTable, MemoryLevel); in fiji_update_dpm_settings()
2564 smu_data->smc_state_table.MemoryLevel; in fiji_update_dpm_settings()
Dvegam_smumgr.c1039 offsetof(SMU75_Discrete_DpmTable, MemoryLevel); in vegam_populate_all_memory_levels()
1043 smu_data->smc_state_table.MemoryLevel; in vegam_populate_all_memory_levels()
/Linux-v5.4/drivers/gpu/drm/radeon/
Dsmu7_discrete.h324 SMU7_Discrete_MemoryLevel MemoryLevel [SMU7_MAX_LEVELS_MEMORY]; member
Dci_dpm.c3328 offsetof(SMU7_Discrete_DpmTable, MemoryLevel); in ci_populate_all_memory_levels()
3331 SMU7_Discrete_MemoryLevel *levels = pi->smc_state_table.MemoryLevel; in ci_populate_all_memory_levels()
3341 &pi->smc_state_table.MemoryLevel[i]); in ci_populate_all_memory_levels()
3346 pi->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; in ci_populate_all_memory_levels()
3350 pi->smc_state_table.MemoryLevel[1].MinVddc = in ci_populate_all_memory_levels()
3351 pi->smc_state_table.MemoryLevel[0].MinVddc; in ci_populate_all_memory_levels()
3352 pi->smc_state_table.MemoryLevel[1].MinVddcPhases = in ci_populate_all_memory_levels()
3353 pi->smc_state_table.MemoryLevel[0].MinVddcPhases; in ci_populate_all_memory_levels()
3356 pi->smc_state_table.MemoryLevel[0].ActivityLevel = cpu_to_be16(0x1F); in ci_populate_all_memory_levels()
3362 pi->smc_state_table.MemoryLevel[dpm_table->mclk_table.count - 1].DisplayWatermark = in ci_populate_all_memory_levels()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/
Dsmu7_discrete.h325 SMU7_Discrete_MemoryLevel MemoryLevel [SMU7_MAX_LEVELS_MEMORY]; member
Dsmu71_discrete.h272 SMU71_Discrete_MemoryLevel MemoryLevel [SMU71_MAX_LEVELS_MEMORY]; member
Dsmu72_discrete.h267 SMU72_Discrete_MemoryLevel MemoryLevel[SMU72_MAX_LEVELS_MEMORY]; member
Dsmu73_discrete.h251 SMU73_Discrete_MemoryLevel MemoryLevel [SMU73_MAX_LEVELS_MEMORY]; member
Dsmu74_discrete.h283 SMU74_Discrete_MemoryLevel MemoryLevel[SMU74_MAX_LEVELS_MEMORY]; member
Dsmu75_discrete.h289 SMU75_Discrete_MemoryLevel MemoryLevel [SMU75_MAX_LEVELS_MEMORY]; member