Searched refs:Memory (Results 1 – 25 of 398) sorted by relevance
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3 bool "NVIDIA Tegra Memory Controller support"7 This driver supports the Memory Controller (MC) hardware found on11 bool "NVIDIA Tegra20 External Memory Controller driver"15 This driver is for the External Memory Controller (EMC) found on21 bool "NVIDIA Tegra124 External Memory Controller driver"25 This driver is for the External Memory Controller (EMC) found on
6 The cdev interface to drivers for Fieldbus Device Memory7 (aka. Process Memory).15 Read from Process Memory's "read area".19 Write to Process Memory's "write area".22 When a "Process Memory Read Area Changed" event occurs,
10 such as Memory Stick, Memory Stick Pro, Secure Digital and21 such as Memory Stick, Memory Stick Pro, Secure Digital and32 such as Memory Stick Pro, Secure Digital and MultiMediaCard.
2 Memory Management APIs5 User Space Memory Access19 Memory Allocation Controls76 Memory pools88 More Memory Management Functions
84 Memory ordering guarantee changes:97 Memory ordering guarantee changes:108 Memory ordering guarantee changes:121 Memory ordering guarantees changes:137 Memory ordering guarantees changes:150 Memory ordering guarantees changes:165 Memory ordering guarantees changes:
1 * Aspeed Firmware Memory controller2 * Aspeed SPI Flash Memory Controller4 The Firmware Memory Controller in the Aspeed AST2500 SoC supports13 "aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller15 "aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller
3 Contact: Linux Memory Management list <linux-mm@kvack.org>9 Contact: Linux Memory Management list <linux-mm@kvack.org>15 Contact: Linux Memory Management list <linux-mm@kvack.org>21 Contact: Linux Memory Management list <linux-mm@kvack.org>27 Contact: Linux Memory Management list <linux-mm@kvack.org>34 Contact: Linux Memory Management list <linux-mm@kvack.org>42 Contact: Linux Memory Management list <linux-mm@kvack.org>48 Contact: Linux Memory Management list <linux-mm@kvack.org>54 Contact: Linux Memory Management list <linux-mm@kvack.org>61 Contact: Linux Memory Management list <linux-mm@kvack.org>[all …]
3 # Memory devices7 bool "Memory Controller drivers"23 This selects the ARM PrimeCell PL172 MultiPort Memory Controller.54 SoCs. AEMIF stands for Asynchronous External Memory Interface and77 This driver is for the General Purpose Memory Controller (GPMC)137 This driver is for the NAND/External Memory Controller (NEMC) in145 This driver is for the Memory Controller module in MediaTek SoCs,153 This driver is for the DDR2/mDDR Memory Controller present on158 tristate "ARM PL35X Static Memory Controller(SMC) driver"163 This driver is for the ARM PL351/PL353 Static Memory
88 Recent Opterons (Family 10h and later) provide for Memory Error186 i7 Core (Nehalem) Integrated Memory Controller that exists on230 Sandy Bridge, Ivy Bridge and Haswell Integrated Memory Controllers.240 Skylake server Integrated Memory Controllers. If your252 10nm server Integrated Memory Controllers. If your261 Pondicherry2 Integrated Memory Controller. This SoC IP is302 tristate "PPC4xx IBM DDR2 Memory Controller"329 tristate "IBM CPC925 Memory Controller (PPC970FX)"333 IBM CPC925 Bridge and Memory Controller, which is338 tristate "Highbank Memory Controller"[all …]
1 * Freescale Smart Direct Memory Access (SDMA) Controller for i.MX42 13 Memory Stick Host Controller43 14 Shared Memory Stick Host Controller45 16 Memory46 17 FIFO type Memory48 19 IPU Memory
464 /* Memory Riser 1 FRU */470 /* Memory Riser 2 FRU */476 /* Memory Riser 3 FRU */482 /* Memory Riser 4 FRU */494 /* Memory Riser 5 FRU */500 /* Memory Riser 6 FRU */506 /* Memory Riser 7 FRU */512 /* Memory Riser 8 FRU */
12 2. With and without An Intelligent Memory Controller which19 On the FPGA Cards we typically simulate an Intelligent Memory controller21 Memory controller we let it to the atomic operations internally while22 doing a Cached (WB) transaction and use the Memory RCW for un-cached
3 bool "Ion Memory Manager"8 Choose this option to enable the ION Memory Manager,26 by the Contiguous Memory Allocator (CMA). If your system has these
3 V4L2 Memory to Memory functions and data structures
3 bool "Samsung Exynos Memory Controller support" if COMPILE_TEST5 Support for the Memory Controller (MC) devices found on
3 bool "ACPI Heterogeneous Memory Attribute Table Support"8 platform's ACPI HMAT (Heterogeneous Memory Attributes Table),
4 Memory Hotplug11 Because Memory Hotplug is still under development, contents of this text will29 Memory Hotplug allows users to increase/decrease the amount of memory.45 There are 2 phases in Memory Hotplug:47 1) Physical Memory Hotplug phase48 2) Logical Memory Hotplug phase.63 Logical Memory Hotplug phase is to change memory state into70 Logical Memory Hotplug phase is triggered by write of sysfs file by system76 Unit of Memory online/offline operation79 Memory hotplug uses SPARSEMEM memory model which allows memory to be divided[all …]
149 | CPU 1 |<----->| Memory |<----->| CPU 2 |237 제공하는데(Memory mapped I/O), 해당 컨트롤 레지스터에 접근하는 순서는 매우2670 <--- CPU ---> : <----------- Memory ----------->2674 | CPU | | Memory | : | CPU | | | | |2676 | | | Queue | : | | | |--->| Memory |2684 | CPU | | Memory | : | CPU | | |--->| Device |2739 : | Memory |2879 Memory mapped I/O 는 일반적으로 CPU 의 메모리 공간 내의 한 윈도우의 특정 부분3066 Chapter 7.1: Memory-Access Ordering3067 Chapter 7.4: Buffering and Combining Memory Writes[all …]
16 * Memory devices23 * Memory Stick28 called DIMM (Dual Inline Memory Module).30 * Memory Socket73 it from the Memory Controller.110 Memory Controllers113 Most of the EDAC core is focused on doing Memory Controller error detection.
16 Itanium Processor Family Memory Ordering". Intel Corporation.92 Memory-model tooling101 Memory". ACM Trans. Program. Lang. Syst. 36, 2, Article 7 (July109 Memory-model comparisons113 Feng. 2016. "Linux-Kernel Memory Model". (6 June 2016).
13 Video Memory-To-Memory Interface30 Memory-to-memory devices function as a shared resource: you can
56 - :cspan:`4` Memory107 - :cspan:`4` Memory132 - :cspan:`4` Memory157 - :cspan:`4` Memory
80 tristate "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"88 This adds the common DEVFREQ driver for Exynos Memory bus. Exynos89 Memory bus has one more group of memory bus (e.g, MIF and INT block).115 It reads Memory Controller counters and adjusts the operating126 This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller).
133 tristate "Qualcomm Shared Memory Manager (SMEM)"137 Say y here to enable support for the Qualcomm Shared Memory Manager.160 tristate "Qualcomm Shared Memory Point to Point support"166 Say yes here to support the Qualcomm Shared Memory Point to Point170 tristate "Qualcomm Shared Memory State Machine"175 Say yes here to support the Qualcomm Shared Memory State Machine.
39 Memory, enumerator70 Memory, enumerator
