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Searched refs:MYPF_REG (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/scsi/csiostor/
Dcsio_mb.c1112 csio_wr_reg32(hw, MBMSGRDYINTEN_F, MYPF_REG(CIM_PF_HOST_INT_ENABLE_A)); in csio_mb_intr_enable()
1113 csio_rd_reg32(hw, MYPF_REG(CIM_PF_HOST_INT_ENABLE_A)); in csio_mb_intr_enable()
1126 MYPF_REG(CIM_PF_HOST_INT_ENABLE_A)); in csio_mb_intr_disable()
1127 csio_rd_reg32(hw, MYPF_REG(CIM_PF_HOST_INT_ENABLE_A)); in csio_mb_intr_disable()
1485 pl_cause = csio_rd_reg32(hw, MYPF_REG(PL_PF_INT_CAUSE_A)); in csio_mb_isr_handler()
1486 cim_cause = csio_rd_reg32(hw, MYPF_REG(CIM_PF_HOST_INT_CAUSE_A)); in csio_mb_isr_handler()
1499 csio_wr_reg32(hw, MBMSGRDYINT_F, MYPF_REG(CIM_PF_HOST_INT_CAUSE_A)); in csio_mb_isr_handler()
1500 csio_wr_reg32(hw, PFCIM_F, MYPF_REG(PL_PF_INT_CAUSE_A)); in csio_mb_isr_handler()
Dcsio_wr.c90 MYPF_REG(SGE_PF_KDOORBELL_A)); in csio_wr_ring_fldb()
102 MYPF_REG(SGE_PF_GTS_A)); in csio_wr_sge_intr_enable()
992 MYPF_REG(SGE_PF_KDOORBELL_A)); in csio_wr_issue()
1253 MYPF_REG(SGE_PF_GTS_A)); in csio_wr_process_iq()
Dcsio_isr.c320 csio_wr_reg32(hw, 0, MYPF_REG(PCIE_PF_CLI_A)); in csio_fcoe_isr()
Dcsio_hw.c2695 csio_set_reg_field(hw, MYPF_REG(PCIE_PF_CFG_A), in csio_hw_intr_enable()
2698 csio_set_reg_field(hw, MYPF_REG(PCIE_PF_CFG_A), in csio_hw_intr_enable()
2701 csio_wr_reg32(hw, PF_INTR_MASK, MYPF_REG(PL_PF_INT_ENABLE_A)); in csio_hw_intr_enable()
2751 csio_wr_reg32(hw, 0, MYPF_REG(PL_PF_INT_ENABLE_A)); in csio_hw_intr_disable()
/Linux-v5.4/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_uld.c428 t4_write_reg(adap, MYPF_REG(SGE_PF_GTS_A), in enable_rx()
680 lld->gts_reg = adap->regs + MYPF_REG(SGE_PF_GTS_A); in uld_init()
681 lld->db_reg = adap->regs + MYPF_REG(SGE_PF_KDOORBELL_A); in uld_init()
Dsge.c555 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A), in ring_fl_db()
979 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A), in cxgb4_ring_tx_db()
3304 t4_write_reg(q->adap, MYPF_REG(SGE_PF_GTS_A), in napi_rx_handler()
3359 t4_write_reg(adap, MYPF_REG(SGE_PF_GTS_A), in process_intrq()
3393 t4_write_reg(adap, MYPF_REG(PCIE_PF_CLI_A), 0); in t4_intr_intx()
Dcxgb4_main.c675 u32 v = t4_read_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A)); in t4_nondata_intr()
679 t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A), v); in t4_nondata_intr()
948 t4_write_reg(adap, MYPF_REG(SGE_PF_GTS_A), in enable_rx()
1857 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A), in cxgb4_sync_txq_pidx()
2044 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A), in enable_txq_db()
2145 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A), in sync_txq_pidx()
Dt4_regs.h39 #define MYPF_REG(reg_addr) (MYPF_BASE + (reg_addr)) macro
Dt4_hw.c5104 t4_write_reg(adapter, MYPF_REG(PL_PF_INT_ENABLE_A), PF_INTR_MASK); in t4_intr_enable()
5127 t4_write_reg(adapter, MYPF_REG(PL_PF_INT_ENABLE_A), 0); in t4_intr_disable()