Searched refs:MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 (Results 1 – 6 of 6) sorted by relevance
119 fsl,pins = <MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0>;
294 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
294 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0 macro
447 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059
836 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0 /* LCD Power Enable */