Searched refs:MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 (Results 1 – 5 of 5) sorted by relevance
246 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
71 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
271 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b1 /* Hsync */
404 #define MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x164 0x478 0x000 0x5 0x0 macro
143 #define MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x0a4 0x3b8 0x000 0x5 0x0 macro