MUX_MODE7 (reference) in projects: Linux-v5.4

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Searched refs:MUX_MODE7 (Results 1 – 25 of 46) sorted by relevance

/Linux-v5.4/arch/arm/boot/dts/
D	am335x-shc.dts	411 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 412 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 413 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 414 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 415 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 416 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 417 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 418 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 419 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 420 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-sbc-t335.dts	111 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) 113 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) 115 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) 117 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) 119 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) 121 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) 123 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) 125 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) 126 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7) 127 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7) [all …]
D	am43x-epos-evm.dts	156 AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP \| PIN_OUTPUT_PULLUP \| MUX_MODE7) 157 AM4372_IOPAD(0x850, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 158 AM4372_IOPAD(0x858, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 159 AM4372_IOPAD(0x860, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 160 AM4372_IOPAD(0x864, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 161 AM4372_IOPAD(0x868, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 162 AM4372_IOPAD(0x86c, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 163 AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP \| PIN_OUTPUT_PULLUP \| MUX_MODE7) 164 AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 165 AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN \| PIN_OUTPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am437x-gp-evm.dts	174 …0x25C (DS0_PULL_UP_DOWN_EN \| PIN_OUTPUT_PULLUP \| DS0_FORCE_OFF_MODE \| MUX_MODE7) /* spi0_cs0.gpio5… 194 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) /* spi0_cs1.gpio0_6 / 206 AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP \| MUX_MODE7) / spi2_d0.gpio3_22 */ 231 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN \| MUX_MODE7) 232 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE7) 233 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 234 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN \| MUX_MODE7) 235 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN \| MUX_MODE7) 236 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN \| MUX_MODE7) 237 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am335x-evmsk.dts	260 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad8.lcd_data23 / 261 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad9.lcd_data22 / 262 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad10.lcd_data21 / 263 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad11.lcd_data20 / 264 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad12.lcd_data19 / 265 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad13.lcd_data18 / 266 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad14.lcd_data17 / 267 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad15.lcd_data16 */ 268 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7) 269 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7) [all …]
D	am335x-sancloud-bbe.dts	41 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 42 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 43 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 44 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 45 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 46 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 47 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 48 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 49 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 50 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am437x-sk-evm.dts	180 AM4372_IOPAD(0xa4c, PIN_OUTPUT \| MUX_MODE7) /* gpio5_13.gpio5_13 / 181 AM4372_IOPAD(0xa50, PIN_OUTPUT \| MUX_MODE7) / spi4_sclk.gpio5_4 / 182 AM4372_IOPAD(0xa54, PIN_INPUT \| MUX_MODE7) / spi4_d0.gpio5_5 / 183 AM4372_IOPAD(0xa58, PIN_INPUT \| MUX_MODE7) / spi4_d1.gpio5_5 / 189 AM4372_IOPAD(0xa28, PIN_OUTPUT \| MUX_MODE7) / uart3_rxd.gpio5_2 / 190 AM4372_IOPAD(0xa2c, PIN_OUTPUT \| MUX_MODE7) / uart3_txd.gpio5_3 / 191 AM4372_IOPAD(0xa30, PIN_OUTPUT \| MUX_MODE7) / uart3_ctsn.gpio5_0 / 192 AM4372_IOPAD(0xa34, PIN_OUTPUT \| MUX_MODE7) / uart3_rtsn.gpio5_1 / 218 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) / spi0_cs1.gpio0_6 / 230 AM4372_IOPAD(0x874, PIN_INPUT \| MUX_MODE7) / gpmc_wpn.gpio0_31 */ [all …]
D	am437x-idk-evm.dts	178 AM4372_IOPAD(0x9b8, PIN_INPUT \| MUX_MODE7) /* cam0_field.gpio4_2 / 191 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN \| MUX_MODE7) 192 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 205 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN \| MUX_MODE7) 206 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN \| MUX_MODE7) 218 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) / spi0_cs1.gpio0_6 */ 224 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN \| MUX_MODE7) 225 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN \| MUX_MODE7) 226 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN \| MUX_MODE7) 227 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am335x-chiliboard.dts	63 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) 64 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 65 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 66 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 67 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 68 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 69 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 70 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 71 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 87 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-lxm.dts	65 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_int / 83 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii2_int / 91 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_int / 92 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_crs_dv / 93 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rxer / 94 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_txen / 95 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_td1 / 96 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_td0 / 97 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rd1 / 98 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rd0 */ [all …]
D	am335x-sl50.dts	228 …AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* SoundPA_en - mcasp0_aclk… 234 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.gpio1_27 / 240 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7) / gpmc_wen.gpio2_4 / 246 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) / gpmc_ad10.gpio0_26 / 277 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) / gpmc_a5.gpio1_21 / 278 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) / gpmc_a6.gpio1_22 / 279 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) / gpmc_a7.gpio1_23 / 280 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) / gpmc_a8.gpio1_24 */ 341 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 342 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-baltos-ir3220.dts	23 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7) /* xdma_event_intr1.… 33 …AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] D… 34 …AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DS… 35 …AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2[24] DCD … 36 …AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gp… 46 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.gpio1[12] D… 47 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.gpio1[13] DS… 48 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad14.gpio1[14] DC… 49 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad15.gpio1[15] RI … 51 …AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18… [all …]
D	am335x-baltos.dtsi	59 AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_INPUT_PULLUP, MUX_MODE7) /* emu0.gpio3[7] / 65 AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_OUTPUT_PULLUP, MUX_MODE7) / emu1.gpio3[8] / 71 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLUP, MUX_MODE7) / gpmc_ben1.gpio1[28] */ 120 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) 121 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 122 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 123 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 124 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 125 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 126 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-guardian.dts	375 AM33XX_IOPAD(0x940, PIN_INPUT \| MUX_MODE7) 381 AM33XX_IOPAD(0x928, PIN_OUTPUT \| MUX_MODE7) 382 AM33XX_IOPAD(0x990, PIN_OUTPUT \| MUX_MODE7) 395 AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP \| SLEWCTRL_SLOW \| MUX_MODE7) 434 AM33XX_IOPAD(0x8a0, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 435 AM33XX_IOPAD(0x8a4, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 436 AM33XX_IOPAD(0x8a8, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 437 AM33XX_IOPAD(0x8ac, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 438 AM33XX_IOPAD(0x8b0, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 439 AM33XX_IOPAD(0x8b4, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) [all …]
D	am335x-baltos-ir5221.dts	23 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7) /* xdma_event_intr1.… 41 …AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] D… 42 …AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DS… 43 …AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2[24] DCD … 44 …AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gp… 54 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.gpio1[12] D… 55 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.gpio1[13] DS… 56 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad14.gpio1[14] DC… 57 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad15.gpio1[15] RI … 59 …AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18… [all …]
D	am335x-icev2.dts	157 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT, MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] / 158 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT, MUX_MODE7) / (K15) gmii1_txd2.gpio0[17] / 159 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) / (A15) xdma_event_intr0.gpio0… 160 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7) /* (D14) xdma_event_intr1.gpio0… 161 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT, MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] / 162 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT, MUX_MODE7) / (K18) gmii1_txclk.gpio3[9] / 191 …AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) / (B12) mcasp0_aclkr.gpio3[1… 228 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) 229 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 230 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-bone-common.dtsi	71 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 / 72 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) / gpmc_a6.gpio1_22 / 73 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_a7.gpio1_23 / 74 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) / gpmc_a8.gpio1_24 */ 127 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 128 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 129 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 130 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 131 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 132 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-osd3358-sm-red.dts	79 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 / 85 …AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / rmii1_ref_clk.gpio0_2… 91 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_rx_er.gpio3_2 / 97 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) / mii1_col.gpio3_0 / 272 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_a5.gpio1_21 / 273 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) / gpmc_a6.gpio1_22 / 274 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_a7.gpio1_23 / 275 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) / gpmc_a8.gpio1_24 */ 320 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 321 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-regor.dtsi	44 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_22 / 45 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / mcasp0_fsx.gpio3_15 / 115 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT, MUX_MODE7) / gpmc_ad11.gpio0_27 / 116 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT, MUX_MODE7) / gpmc_ad10.gpio0_26 / 117 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT, MUX_MODE7) / gpmc_ad9.gpio0_23 / 118 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT, MUX_MODE7) / gpmc_ad8.gpio0_22 / 120 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE7) / gpmc_ad15.gpio1_15 / 121 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE7) / gpmc_ad14.gpio1_14 / 122 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE7) / gpmc_ad13.gpio1_13 / 123 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE7) / gpmc_ad12.gpio1_12 */ [all …]
D	omap4-droid4-xt894.dts	528 OMAP4_IOPAD(0x196, MUX_MODE7) 529 OMAP4_IOPAD(0x198, MUX_MODE7) 550 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP \| MUX_MODE7) 551 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP \| MUX_MODE7) 552 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP \| MUX_MODE7) 553 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP \| MUX_MODE7) 554 OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP \| MUX_MODE7) 555 OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP \| MUX_MODE7) 556 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP \| MUX_MODE7) 557 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP \| MUX_MODE7) [all …]
D	am335x-cm-t335.dts	110 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT, MUX_MODE7) 126 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) 208 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 209 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 210 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 211 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 212 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 213 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 214 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 215 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-boneblue.dts	120 …AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 / 121 …AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) / (U15) gpmc_a6.gpio1[22] - USR_LED_1 / 122 …AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) / (T15) gpmc_a7.gpio1[23] - USR_LED_2 / 123 …AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) / (V16) gpmc_a8.gpio1[24] - USR_LED_3 / 124 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) / (A15) xdma_event_intr0.gpio0… 125 …AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P… 126 …AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.… 127 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, … 128 …AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32,… 129 …AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, B… [all …]
D	am335x-evm.dts	190 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 / 191 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_a6.gpio1_22 / 192 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_a9.gpio1_25 / 193 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_a10.gpio1_26 / 194 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_a11.gpio1_27 / 200 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) / spi0_sclk.gpio0_2 / 201 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLDOWN, MUX_MODE7) / spi0_d0.gpio0_3 / 252 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) / gpmc_wpn.gpio0_30 */ 288 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 289 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-baltos-ir2110.dts	`27 …AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] D… 28 …AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DS… 29 …AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2[24] DCD … 30 …AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gp… 36 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE7) /* MMC1 CD */`
D	am335x-pepper.dts	130 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT, MUX_MODE7) /* gpmc_wen.gpio2_4 / 182 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7) / gpmc_a0.gpio1_16 / 257 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLUP, MUX_MODE7) / gpmc_a11.gpio1_27 / 312 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLUP, MUX_MODE7) / rmii2_refclk.gpio0_29 / 314 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLUP, MUX_MODE7) / mii1_col.gpio3_0 / 370 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) / spi0_cs1.gpio0_6 / 386 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE7) / gpmc_wpn.gpio0_31 / 398 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) / gpmc_a8.gpio1_24 / 400 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_OUTPUT_PULLUP, MUX_MODE7) / gpmc_wait0.gpio0_30 / 591 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7) / gpmc_a9.gpio1_25 */ [all …]