Searched refs:MT2063_REG_RSVD_20 (Results 1 – 1 of 1) sorted by relevance
180 MT2063_REG_RSVD_20, /* 0x20: Reserved */ enumerator1066 val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */ in mt2063_set_dnc_output_enable()1067 if (state->reg[MT2063_REG_RSVD_20] != in mt2063_set_dnc_output_enable()1071 MT2063_REG_RSVD_20, in mt2063_set_dnc_output_enable()1092 val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */ in mt2063_set_dnc_output_enable()1093 if (state->reg[MT2063_REG_RSVD_20] != in mt2063_set_dnc_output_enable()1097 MT2063_REG_RSVD_20, in mt2063_set_dnc_output_enable()1118 val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */ in mt2063_set_dnc_output_enable()1119 if (state->reg[MT2063_REG_RSVD_20] != in mt2063_set_dnc_output_enable()1123 MT2063_REG_RSVD_20, in mt2063_set_dnc_output_enable()[all …]
