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Searched refs:MSB (Results 1 – 25 of 66) sorted by relevance

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/Linux-v5.4/arch/sh/boards/mach-microdev/
Dfdc37c93xapm.c58 #define MSB(x) ( (x) >> 8 ) macro
95 SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); in smsc_superio_setup()
106 SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); in smsc_superio_setup()
117 SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); in smsc_superio_setup()
119 SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); in smsc_superio_setup()
131 SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); in smsc_superio_setup()
133 SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); in smsc_superio_setup()
/Linux-v5.4/Documentation/sound/soc/
Ddai.rst38 MSB is transmitted on the falling edge of the first BCLK after LRC
42 MSB is transmitted on transition of LRC.
45 MSB is transmitted sample size BCLKs before LRC transition.
61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
64 MSB is transmitted on rising edge of FRAME/SYNC.
/Linux-v5.4/Documentation/devicetree/bindings/gpio/
Dnetxbig-gpio-ext.txt6 - addr-gpios: GPIOs representing the address register (LSB -> MSB).
7 - data-gpios: GPIOs representing the data register (LSB -> MSB).
/Linux-v5.4/Documentation/hwmon/
Dsmsc47b397.rst41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
73 LSB MSB
83 Reading the tach LSB locks the tach MSB.
89 The tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB)
191 OUT DX,AL ; Point to HWM Base Addr MSB
193 IN AL,DX ; Get MSB of HWM Base Addr
/Linux-v5.4/Documentation/ABI/testing/
Dsysfs-bus-usb-devices-usbsevseg15 MSB 0x06; LSB 0x3F, and
17 MSB 0x08; LSB 0xFF.
/Linux-v5.4/Documentation/usb/
Dmisc_usbsevseg.rst20 MSB 0x06; LSB 0x3f
24 MSB 0x08; LSB 0xff
/Linux-v5.4/drivers/gpio/
Dgpio-stmpe.c24 enum { LSB, CSB, MSB }; enumerator
183 [REG_RE][MSB] = STMPE_IDX_GPRER_MSB, in stmpe_gpio_irq_sync_unlock()
186 [REG_FE][MSB] = STMPE_IDX_GPFER_MSB, in stmpe_gpio_irq_sync_unlock()
189 [REG_IE][MSB] = STMPE_IDX_IEGPIOR_MSB, in stmpe_gpio_irq_sync_unlock()
/Linux-v5.4/Documentation/devicetree/bindings/input/
Dgpio-decoder.txt6 first entry representing the MSB.
/Linux-v5.4/Documentation/devicetree/bindings/sound/
Dfsl-sai.txt33 - lsb-first : Configures whether the LSB or the MSB is transmitted
35 the MSB is transmitted first as default, or the LSB
/Linux-v5.4/drivers/media/dvb-frontends/
Dstv6110x_priv.h49 #define MSB(y) ((y >> 8) & 0xff) macro
Dstv0367_priv.h39 #define MSB(Y) (((Y) >> 8) & 0xff) macro
Dstb0899_priv.h51 #define MSB(y) ((y >> 8) & 0xff) macro
Dstv090x_priv.h68 #define MSB(__x) ((__x >> 8) & 0xff) macro
Dstv0900_priv.h25 #define MSB(Y) (((Y) >> 8) & 0xFF) macro
/Linux-v5.4/arch/x86/crypto/
Dcrc32c-pcl-intel-asm_64.S275 shl $1, len_dw # Get next MSB
302 less_than_2: # Length should be stored in the MSB
/Linux-v5.4/Documentation/devicetree/bindings/hwmon/
Dgpio-fan.txt8 ordered MSB-->LSB.
/Linux-v5.4/Documentation/devicetree/bindings/thermal/
Darmada-thermal.txt24 "control MSB/control 1", with size of 4 (deprecated binding), or point
/Linux-v5.4/Documentation/driver-api/nfc/
Dnfc-pn544.rst29 checksum. Firmware update messages have the length in the second (MSB)
/Linux-v5.4/Documentation/devicetree/bindings/eeprom/
Dat25.txt16 For 9 bits, the MSB of the address is sent as bit 3 of the instruction
/Linux-v5.4/Documentation/hid/
Dhid-alps.rst78 Byte5 Address - Byte 3 (MSB)
98 Byte5 Address - Byte 3 (MSB)
/Linux-v5.4/Documentation/fb/
Dvt8623fb.rst35 with interleaved planes (1 byte interleave), MSB first. Both modes support
Darkfb.rst38 with interleaved planes (1 byte interleave), MSB first. Both modes support
Ds3fb.rst47 with interleaved planes (1 byte interleave), MSB first. Both modes support
/Linux-v5.4/drivers/net/wireless/intel/ipw2x00/
Dipw2200.h1632 #define MSB 1 macro
1640 #define EEPROM_PME_CAPABILITY (GET_EEPROM_ADDR(0x09,MSB)) /* 1 byte */
1642 #define EEPROM_VERSION (GET_EEPROM_ADDR(0x24,MSB)) /* 1 byte */
1644 #define EEPROM_SKU_CAPABILITY (GET_EEPROM_ADDR(0x25,MSB)) /* 1 byte */
1647 #define EEPROM_IBSS_CHANNELS_A (GET_EEPROM_ADDR(0x29,MSB)) /* 5 bytes */
/Linux-v5.4/Documentation/virt/kvm/
Dtimekeeping.txt135 set timer to read LSB only and force MSB to zero;
138 0010 - Set Timer 0 MSB mode for port 0x40
139 set timer to read MSB only and force LSB to zero;
143 set timer to read / write LSB first, then MSB;
148 0110 - Set Timer 1 MSB mode for port 0x41 - as described above
153 1010 - Set Timer 2 MSB mode for port 0x42 - as described above
174 01 = MSB only
176 11 = LSB / MSB (16-bit)

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