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Searched refs:MMC_TIMING_MMC_DDR52 (Results 1 – 25 of 31) sorted by relevance

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/Linux-v5.4/drivers/mmc/host/
Ddw_mmc-hi3798cv200.c38 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_hi3798cv200_set_ios()
46 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()
Ddw_mmc-rockchip.c47 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
105 case MMC_TIMING_MMC_DDR52: in dw_mci_rk3288_set_ios()
Dsdhci-xenon.c209 (timing == MMC_TIMING_MMC_DDR52)) in xenon_set_uhs_signaling()
344 host->timing == MMC_TIMING_MMC_DDR52) in xenon_execute_tuning()
Dsdhci-sprd.c95 { "sprd,phy-delay-mmc-ddr52", MMC_TIMING_MMC_DDR52, },
331 case MMC_TIMING_MMC_DDR52: in sdhci_sprd_set_uhs_signaling()
Dsdhci-xenon-phy.c621 case MMC_TIMING_MMC_DDR52: in xenon_emmc_phy_set()
749 case MMC_TIMING_MMC_DDR52: in xenon_hs_delay_adj()
Dsdhci-omap.c767 if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) in sdhci_omap_set_uhs_signaling()
989 pinctrl_state[MMC_TIMING_MMC_DDR52] = state; in sdhci_omap_config_iodelay_pinctrl_state()
995 pinctrl_state[MMC_TIMING_MMC_DDR52] = state; in sdhci_omap_config_iodelay_pinctrl_state()
Dmmci_stm32_sdmmc.c171 if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52 || in mmci_sdmmc_set_clkreg()
Dsdhci-pci-arasan.c283 case MMC_TIMING_MMC_DDR52: in arasan_select_phy_clock()
Dsdhci-cadence.c206 case MMC_TIMING_MMC_DDR52: in sdhci_cdns_set_uhs_signaling()
Dsdhci-of-at91.c112 if (timing == MMC_TIMING_MMC_DDR52) in sdhci_at91_set_uhs_signaling()
Dsunxi-mmc.c737 ios->timing != MMC_TIMING_MMC_DDR52) { in sunxi_mmc_clk_set_phase()
782 if (ios->timing == MMC_TIMING_MMC_DDR52 && in sunxi_mmc_clk_set_rate()
887 ios->timing == MMC_TIMING_MMC_DDR52) in sunxi_mmc_set_clk()
Dsdhci-st.c292 case MMC_TIMING_MMC_DDR52: in sdhci_st_set_uhs_signaling()
Ddw_mmc-exynos.c307 case MMC_TIMING_MMC_DDR52: in dw_mci_exynos_set_ios()
Dsdhci-pxav3.c267 case MMC_TIMING_MMC_DDR52: in pxav3_set_uhs_signaling()
Dmeson-gx-mmc.c553 case MMC_TIMING_MMC_DDR52: in meson_mmc_prepare_ios_clock()
573 case MMC_TIMING_MMC_DDR52: in meson_mmc_check_resampling()
Drtsx_pci_sdmmc.c982 case MMC_TIMING_MMC_DDR52: in sd_set_timing()
1063 case MMC_TIMING_MMC_DDR52: in sdmmc_set_ios()
Dsdhci.c1523 case MMC_TIMING_MMC_DDR52: in sdhci_get_preset_value()
1881 (timing == MMC_TIMING_MMC_DDR52)) in sdhci_set_uhs_signaling()
1952 ios->timing == MMC_TIMING_MMC_DDR52 || in sdhci_set_ios()
2021 (ios->timing == MMC_TIMING_MMC_DDR52))) { in sdhci_set_ios()
Dsdhci-msm.c311 ios.timing == MMC_TIMING_MMC_DDR52 || in msm_get_clock_rate_for_bus_mode()
1227 case MMC_TIMING_MMC_DDR52: in sdhci_msm_set_uhs_signaling()
Dmmci.c416 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
1038 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
Domap_hsmmc.c568 (ios->timing != MMC_TIMING_MMC_DDR52) && in omap_hsmmc_set_clock()
589 if (ios->timing == MMC_TIMING_MMC_DDR52 || in omap_hsmmc_set_bus_width()
/Linux-v5.4/drivers/mmc/core/
Dhost.h67 return card->host->ios.timing == MMC_TIMING_MMC_DDR52; in mmc_card_ddr52()
Ddebugfs.c143 case MMC_TIMING_MMC_DDR52: in mmc_ios_show()
Dmmc.c1090 MMC_TIMING_MMC_DDR52, in mmc_select_hs_ddr()
1251 mmc_set_timing(host, MMC_TIMING_MMC_DDR52); in mmc_hs400_to_hs200()
/Linux-v5.4/include/linux/mmc/
Dhost.h60 #define MMC_TIMING_MMC_DDR52 8 macro
/Linux-v5.4/drivers/staging/greybus/
Dsdio.c666 case MMC_TIMING_MMC_DDR52: in gb_mmc_set_ios()

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