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Searched refs:MMCR1_TD_CP_DBG0SEL_SH (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/arch/powerpc/perf/
Dppc970-pmu.c52 #define MMCR1_TD_CP_DBG0SEL_SH 50 macro
340 << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte); in p970_compute_mmcr()
Dpower5-pmu.c48 #define MMCR1_TD_CP_DBG0SEL_SH 54 macro
483 << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte); in power5_compute_mmcr()
Dpower5+-pmu.c48 #define MMCR1_TD_CP_DBG0SEL_SH 54 macro
543 << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte); in power5p_compute_mmcr()