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Searched refs:MLX5_GET (Results 1 – 25 of 60) sorted by relevance

123

/Linux-v5.4/include/linux/mlx5/
Dfs_helpers.h46 return MLX5_GET(fte_match_set_misc, misc_params_c, outer_esp_spi); in mlx5_fs_is_ipsec_flow()
57 return MLX5_GET(fte_match_set_lyr_2_4, headers_c, ip_protocol) == 0xff && in _mlx5_fs_is_outer_ipproto_flow()
58 MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol) == match; in _mlx5_fs_is_outer_ipproto_flow()
78 return MLX5_GET(fte_match_set_misc, misc_params_c, vxlan_vni); in mlx5_fs_is_vxlan_flow()
106 return MLX5_GET(fte_match_set_lyr_2_4, headers_c, in _mlx5_fs_is_outer_ipv_flow()
108 MLX5_GET(fte_match_set_lyr_2_4, headers_v, in _mlx5_fs_is_outer_ipv_flow()
112 return MLX5_GET(fte_match_set_lyr_2_4, headers_c, in _mlx5_fs_is_outer_ipv_flow()
114 MLX5_GET(fte_match_set_lyr_2_4, headers_v, in _mlx5_fs_is_outer_ipv_flow()
139 return MLX5_GET(fte_match_set_misc, misc_params_c, outer_esp_spi); in mlx5_fs_is_outer_ipsec_flow()
Ddevice.h95 #define MLX5_GET(typ, p, fld) ((be32_to_cpu(*((__be32 *)(p) +\ macro
100 u32 ___t = MLX5_GET(typ, p, fld); \
149 tmp = (__force type_t)MLX5_GET(typ, p, fld); \
152 tmp = (__force type_t)cpu_to_be16(MLX5_GET(typ, p, fld)); \
155 tmp = (__force type_t)cpu_to_be32(MLX5_GET(typ, p, fld)); \
1139 MLX5_GET(cmd_hca_cap, mdev->caps.hca_cur[MLX5_CAP_GENERAL], cap)
1145 MLX5_GET(cmd_hca_cap, mdev->caps.hca_max[MLX5_CAP_GENERAL], cap)
1148 MLX5_GET(per_protocol_networking_offload_caps,\
1152 MLX5_GET(per_protocol_networking_offload_caps,\
1156 MLX5_GET(per_protocol_networking_offload_caps,\
[all …]
/Linux-v5.4/drivers/infiniband/hw/mlx5/
Dcong.c97 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
100 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
103 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
106 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
109 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
112 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
115 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
118 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
121 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
124 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
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Ddevx.c158 uid = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id); in mlx5_ib_devx_create()
176 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, opcode); in mlx5_ib_devx_is_flow_dest()
181 *dest_id = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, in mlx5_ib_devx_is_flow_dest()
187 *dest_id = MLX5_GET(destroy_flow_table_in, devx_obj->dinbox, in mlx5_ib_devx_is_flow_dest()
198 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, opcode); in mlx5_ib_devx_is_flow_counter()
201 *counter_id = MLX5_GET(dealloc_flow_counter_in, in mlx5_ib_devx_is_flow_counter()
326 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type); in get_event_obj_type()
347 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode); in devx_get_obj_id()
354 MLX5_GET(general_obj_in_cmd_hdr, in, in devx_get_obj_id()
356 MLX5_GET(general_obj_in_cmd_hdr, in, in devx_get_obj_id()
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Dsrq_cmd.c57 if (MLX5_GET(wq, wq, wq_signature)) in get_wq()
59 in->log_page_size = MLX5_GET(wq, wq, log_wq_pg_sz); in get_wq()
60 in->wqe_shift = MLX5_GET(wq, wq, log_wq_stride) - 4; in get_wq()
61 in->log_size = MLX5_GET(wq, wq, log_wq_sz); in get_wq()
62 in->page_offset = MLX5_GET(wq, wq, page_offset); in get_wq()
63 in->lwm = MLX5_GET(wq, wq, lwm); in get_wq()
64 in->pd = MLX5_GET(wq, wq, pd); in get_wq()
70 if (MLX5_GET(srqc, srqc, wq_signature)) in get_srqc()
72 in->log_page_size = MLX5_GET(srqc, srqc, log_page_size); in get_srqc()
73 in->wqe_shift = MLX5_GET(srqc, srqc, log_rq_stride); in get_srqc()
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/Linux-v5.4/drivers/net/ethernet/mellanox/mlx5/core/diag/
Dfs_tracepoint.c41 {.m = MLX5_GET(spec, mask, fld),\
42 .v = MLX5_GET(spec, val, fld)}
50 (name.m = MLX5_GET(type, mask, fld), \
51 name.v = MLX5_GET(type, val, fld), \
69 .m = MLX5_GET(fte_match_set_lyr_2_4, mask, smac_47_16) << 16 | in print_lyr_2_4_hdrs()
70 MLX5_GET(fte_match_set_lyr_2_4, mask, smac_15_0), in print_lyr_2_4_hdrs()
71 .v = MLX5_GET(fte_match_set_lyr_2_4, value, smac_47_16) << 16 | in print_lyr_2_4_hdrs()
72 MLX5_GET(fte_match_set_lyr_2_4, value, smac_15_0)}; in print_lyr_2_4_hdrs()
74 .m = MLX5_GET(fte_match_set_lyr_2_4, mask, dmac_47_16) << 16 | in print_lyr_2_4_hdrs()
75 MLX5_GET(fte_match_set_lyr_2_4, mask, dmac_15_0), in print_lyr_2_4_hdrs()
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Dfw_tracer.c55 if (!MLX5_GET(mtrc_cap, out, trace_to_memory)) { in mlx5_query_mtrc_caps()
60 tracer->trc_ver = MLX5_GET(mtrc_cap, out, trc_ver); in mlx5_query_mtrc_caps()
62 MLX5_GET(mtrc_cap, out, first_string_trace); in mlx5_query_mtrc_caps()
64 MLX5_GET(mtrc_cap, out, num_string_trace); in mlx5_query_mtrc_caps()
65 tracer->str_db.num_string_db = MLX5_GET(mtrc_cap, out, num_string_db); in mlx5_query_mtrc_caps()
66 tracer->owner = !!MLX5_GET(mtrc_cap, out, trace_owner); in mlx5_query_mtrc_caps()
70 string_db_base_address_out[i] = MLX5_GET(mtrc_string_db_param, in mlx5_query_mtrc_caps()
73 string_db_size_out[i] = MLX5_GET(mtrc_string_db_param, in mlx5_query_mtrc_caps()
107 tracer->owner = !!MLX5_GET(mtrc_cap, out, trace_owner); in mlx5_fw_tracer_ownership_acquire()
458 tracer_event->event_id = MLX5_GET(tracer_event, trace, event_id); in poll_trace()
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/Linux-v5.4/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_ste.c223 return MLX5_GET(ste_general, hw_ste_p, entry_type); in mlx5dr_ste_get_entry_type()
270 (MLX5_GET(ste_rx_steering_mult, hw_ste, miss_address_31_6) | in mlx5dr_ste_get_miss_addr()
271 MLX5_GET(ste_rx_steering_mult, hw_ste, miss_address_39_32) << 26); in mlx5dr_ste_get_miss_addr()
551 if (MLX5_GET(ste_general, hw_ste, next_lu_type) == in mlx5dr_ste_is_not_valid_entry()
614 next_lu_type = MLX5_GET(ste_general, hw_ste, next_lu_type); in mlx5dr_ste_create_next_htbl()
615 byte_mask = MLX5_GET(ste_general, hw_ste, byte_mask); in mlx5dr_ste_create_next_htbl()
813 spec->gre_c_present = MLX5_GET(fte_match_set_misc, mask, gre_c_present); in dr_ste_copy_mask_misc()
814 spec->gre_k_present = MLX5_GET(fte_match_set_misc, mask, gre_k_present); in dr_ste_copy_mask_misc()
815 spec->gre_s_present = MLX5_GET(fte_match_set_misc, mask, gre_s_present); in dr_ste_copy_mask_misc()
816 spec->source_vhca_port = MLX5_GET(fte_match_set_misc, mask, source_vhca_port); in dr_ste_copy_mask_misc()
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Ddr_cmd.c60 *gvmi = MLX5_GET(query_hca_cap_out, out, capability.cmd_hca_cap.vhca_id); in mlx5dr_cmd_query_gvmi()
148 output->status = MLX5_GET(query_flow_table_out, out, status); in mlx5dr_cmd_query_flow_table()
149 output->level = MLX5_GET(query_flow_table_out, out, flow_table_context.level); in mlx5dr_cmd_query_flow_table()
256 *modify_header_id = MLX5_GET(alloc_modify_header_context_out, out, in mlx5dr_cmd_alloc_modify_header()
299 *group_id = MLX5_GET(create_flow_group_out, out, group_id); in mlx5dr_cmd_create_empty_flow_group()
367 *table_id = MLX5_GET(create_flow_table_out, out, table_id); in mlx5dr_cmd_create_flow_table()
370 (u64)MLX5_GET(create_flow_table_out, out, icm_address_31_0) | in mlx5dr_cmd_create_flow_table()
371 (u64)MLX5_GET(create_flow_table_out, out, icm_address_39_32) << 32 | in mlx5dr_cmd_create_flow_table()
372 (u64)MLX5_GET(create_flow_table_out, out, icm_address_63_40) << 40; in mlx5dr_cmd_create_flow_table()
427 *reformat_id = MLX5_GET(alloc_packet_reformat_context_out, out, packet_reformat_id); in mlx5dr_cmd_create_reformat_ctx()
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Ddr_action.c847 hdr_fld_4b = MLX5_GET(l2_hdr, l2_hdr, dmac_47_16); in dr_actions_l2_rewrite()
861 hdr_fld_4b = (MLX5_GET(l2_hdr, l2_hdr, smac_31_0) >> 16 | in dr_actions_l2_rewrite()
862 MLX5_GET(l2_hdr, l2_hdr, smac_47_32) << 16); in dr_actions_l2_rewrite()
876 hdr_fld_2b = MLX5_GET(l2_hdr, l2_hdr, dmac_15_0); in dr_actions_l2_rewrite()
889 hdr_fld_2b = MLX5_GET(l2_hdr, l2_hdr, ethertype); in dr_actions_l2_rewrite()
893 hdr_fld_2b = MLX5_GET(l2_hdr, l2_hdr, ethertype); in dr_actions_l2_rewrite()
895 hdr_fld_2b = MLX5_GET(l2_hdr, l2_hdr, vlan); in dr_actions_l2_rewrite()
911 hdr_fld_2b = MLX5_GET(l2_hdr, l2_hdr, smac_31_0); in dr_actions_l2_rewrite()
919 hdr_fld_2b = MLX5_GET(l2_hdr, l2_hdr, vlan_type); in dr_actions_l2_rewrite()
1228 action = MLX5_GET(set_action_in, sw_action, action_type); in dr_action_modify_sw_to_hw()
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/Linux-v5.4/drivers/net/ethernet/mellanox/mlx5/core/
Dwq.c66 u8 log_wq_stride = MLX5_GET(wq, wqc, log_wq_stride); in mlx5_wq_cyc_create()
67 u8 log_wq_sz = MLX5_GET(wq, wqc, log_wq_sz); in mlx5_wq_cyc_create()
103 u8 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride) + 4; in mlx5_wq_qp_create()
104 u8 log_rq_sz = MLX5_GET(qpc, qpc, log_rq_size); in mlx5_wq_qp_create()
106 u8 log_sq_sz = MLX5_GET(qpc, qpc, log_sq_size); in mlx5_wq_qp_create()
164 u8 log_wq_stride = MLX5_GET(cqc, cqc, cqe_sz) == CQE_STRIDE_64 ? 6 : 7; in mlx5_cqwq_create()
165 u8 log_wq_sz = MLX5_GET(cqc, cqc, log_cq_size); in mlx5_cqwq_create()
201 u8 log_wq_stride = MLX5_GET(wq, wqc, log_wq_stride); in mlx5_wq_ll_create()
202 u8 log_wq_sz = MLX5_GET(wq, wqc, log_wq_sz); in mlx5_wq_ll_create()
Dport.c167 *link_width_oper = MLX5_GET(ptys_reg, out, ib_link_width_oper); in mlx5_query_port_link_width_oper()
184 *proto_oper = MLX5_GET(ptys_reg, out, ib_proto_oper); in mlx5_query_port_ib_proto_oper()
228 *status = MLX5_GET(paos_reg, out, admin_status); in mlx5_query_port_admin_status()
244 *max_mtu = MLX5_GET(pmtu_reg, out, max_mtu); in mlx5_query_port_mtu()
246 *oper_mtu = MLX5_GET(pmtu_reg, out, oper_mtu); in mlx5_query_port_mtu()
248 *admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu); in mlx5_query_port_mtu()
290 module_mapping = MLX5_GET(pmlp_reg, out, lane0_module_mapping); in mlx5_query_module_num()
361 status = MLX5_GET(mcia_reg, out, status); in mlx5_query_module_eeprom()
394 *vl_hw_cap = MLX5_GET(pvlc_reg, out, vl_hw_cap); in mlx5_query_port_vl_hw_cap()
459 *rx_pause = MLX5_GET(pfcc_reg, out, pprx); in mlx5_query_port_pause()
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Dmr.c79 mkey_index = MLX5_GET(create_mkey_out, lout, mkey_index); in mlx5_core_create_mkey_cb()
83 mkey->pd = MLX5_GET(mkc, mkc, pd); in mlx5_core_create_mkey_cb()
142 case 1: return MLX5_GET(create_psv_out, out, psv1_index); in mlx5_get_psv()
143 case 2: return MLX5_GET(create_psv_out, out, psv2_index); in mlx5_get_psv()
144 case 3: return MLX5_GET(create_psv_out, out, psv3_index); in mlx5_get_psv()
145 default: return MLX5_GET(create_psv_out, out, psv0_index); in mlx5_get_psv()
Dfw.c119 *vendor_id = MLX5_GET(query_adapter_out, out, in mlx5_core_query_vendor_id()
296 force_state = MLX5_GET(teardown_hca_out, out, state); in mlx5_cmd_force_teardown_hca()
327 state = MLX5_GET(teardown_hca_out, out, state); in mlx5_cmd_fast_teardown_hca()
398 *update_handle = MLX5_GET(mcc_reg, out, update_handle); in mlx5_reg_mcc_query()
399 *error_code = MLX5_GET(mcc_reg, out, error_code); in mlx5_reg_mcc_query()
400 *control_state = MLX5_GET(mcc_reg, out, control_state); in mlx5_reg_mcc_query()
476 *max_component_size = MLX5_GET(mcqi_cap, mcqi_reg, max_component_size); in mlx5_reg_mcqi_caps_query()
477 *log_mcda_word_size = MLX5_GET(mcqi_cap, mcqi_reg, log_mcda_word_size); in mlx5_reg_mcqi_caps_query()
478 *mcda_max_write_size = MLX5_GET(mcqi_cap, mcqi_reg, mcda_max_write_size); in mlx5_reg_mcqi_caps_query()
682 identifier = MLX5_GET(mcqs_reg, out, identifier); in mlx5_get_boot_img_component_index()
[all …]
Dtransobj.c48 *tdn = MLX5_GET(alloc_transport_domain_out, out, in mlx5_core_alloc_transport_domain()
75 *rqn = MLX5_GET(create_rq_out, out, rqn); in mlx5_core_create_rq()
124 *sqn = MLX5_GET(create_sq_out, out, sqn); in mlx5_core_create_sq()
177 *state = MLX5_GET(sqc, sqc, state); in mlx5_core_query_sq_state()
204 *tirn = MLX5_GET(create_tir_out, out, tirn); in mlx5_core_create_tir()
240 *tisn = MLX5_GET(create_tis_out, out, tisn); in mlx5_core_create_tis()
278 *rqtn = MLX5_GET(create_rqt_out, out, rqtn); in mlx5_core_create_rqt()
Ddebugfs.c319 param = 1 << MLX5_GET(eqc, ctx, log_eq_size); in eq_read_field()
322 param = MLX5_GET(eqc, ctx, intr); in eq_read_field()
325 param = MLX5_GET(eqc, ctx, log_page_size) + 12; in eq_read_field()
359 param = 1 << MLX5_GET(cqc, ctx, log_cq_size); in cq_read_field()
362 param = MLX5_GET(cqc, ctx, log_page_size); in cq_read_field()
Dqp.c281 qp->qpn = MLX5_GET(create_dct_out, out, dctn); in mlx5_core_create_dct()
282 qp->uid = MLX5_GET(create_dct_in, in, uid); in mlx5_core_create_dct()
309 qp->uid = MLX5_GET(create_qp_in, in, uid); in mlx5_core_create_qp()
310 qp->qpn = MLX5_GET(create_qp_out, out, qpn); in mlx5_core_create_qp()
579 *xrcdn = MLX5_GET(alloc_xrcd_out, out, xrcd); in mlx5_core_xrcd_alloc()
616 rq->uid = MLX5_GET(create_rq_in, in, uid); in mlx5_core_create_rq_tracked()
660 sq->uid = MLX5_GET(create_sq_in, in, uid); in mlx5_core_create_sq_tracked()
692 *counter_id = MLX5_GET(alloc_q_counter_out, out, in mlx5_core_alloc_q_counter()
Dcq.c93 int eqn = MLX5_GET(cqc, MLX5_ADDR_OF(create_cq_in, in, cq_context), c_eqn); in mlx5_core_create_cq()
109 cq->cqn = MLX5_GET(create_cq_out, out, cqn); in mlx5_core_create_cq()
113 cq->uid = MLX5_GET(create_cq_in, in, uid); in mlx5_core_create_cq()
/Linux-v5.4/drivers/net/ethernet/mellanox/mlx5/core/en/
Dport.c123 *an_status = MLX5_GET(ptys_reg, out, an_status); in mlx5_port_query_eth_autoneg()
124 *an_disable_cap = MLX5_GET(ptys_reg, out, an_disable_cap); in mlx5_port_query_eth_autoneg()
125 *an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin); in mlx5_port_query_eth_autoneg()
293 prio_x_buff = MLX5_GET(pptb_reg, out, prio_x_buff); in mlx5e_port_query_priority2buffer()
366 *fec_policy = MLX5_GET(pplm_reg, pplm, in mlx5e_fec_admin_field()
374 *fec_policy = MLX5_GET(pplm_reg, pplm, in mlx5e_fec_admin_field()
382 *fec_policy = MLX5_GET(pplm_reg, pplm, in mlx5e_fec_admin_field()
390 *fec_policy = MLX5_GET(pplm_reg, pplm, in mlx5e_fec_admin_field()
398 *fec_policy = MLX5_GET(pplm_reg, pplm, in mlx5e_fec_admin_field()
418 *fec_cap = MLX5_GET(pplm_reg, pplm, in mlx5e_get_fec_cap_field()
[all …]
Dport_buffer.c56 MLX5_GET(bufferx_reg, buffer, lossy); in mlx5e_port_query_buffer()
58 MLX5_GET(bufferx_reg, buffer, epsb); in mlx5e_port_query_buffer()
60 MLX5_GET(bufferx_reg, buffer, size) << MLX5E_BUFFER_CELL_SHIFT; in mlx5e_port_query_buffer()
62 MLX5_GET(bufferx_reg, buffer, xon_threshold) << MLX5E_BUFFER_CELL_SHIFT; in mlx5e_port_query_buffer()
64 MLX5_GET(bufferx_reg, buffer, xoff_threshold) << MLX5E_BUFFER_CELL_SHIFT; in mlx5e_port_query_buffer()
76 MLX5_GET(pbmc_reg, out, port_buffer_size) << MLX5E_BUFFER_CELL_SHIFT; in mlx5e_port_query_buffer()
/Linux-v5.4/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dport_tun.c35 entropy_flags->force_supported = !!(MLX5_GET(pcmr_reg, out, entropy_force_cap)); in mlx5_query_port_tun_entropy()
36 entropy_flags->calc_supported = !!(MLX5_GET(pcmr_reg, out, entropy_calc_cap)); in mlx5_query_port_tun_entropy()
37 entropy_flags->gre_calc_supported = !!(MLX5_GET(pcmr_reg, out, entropy_gre_calc_cap)); in mlx5_query_port_tun_entropy()
38 entropy_flags->force_enabled = !!(MLX5_GET(pcmr_reg, out, entropy_force)); in mlx5_query_port_tun_entropy()
39 entropy_flags->calc_enabled = !!(MLX5_GET(pcmr_reg, out, entropy_calc)); in mlx5_query_port_tun_entropy()
40 entropy_flags->gre_calc_enabled = !!(MLX5_GET(pcmr_reg, out, entropy_gre_calc)); in mlx5_query_port_tun_entropy()
Dclock.c447 clock->ptp_info.n_pins = MLX5_GET(mtpps_reg, out, in mlx5_get_pps_caps()
449 clock->ptp_info.n_ext_ts = MLX5_GET(mtpps_reg, out, in mlx5_get_pps_caps()
451 clock->ptp_info.n_per_out = MLX5_GET(mtpps_reg, out, in mlx5_get_pps_caps()
454 clock->pps_info.pin_caps[0] = MLX5_GET(mtpps_reg, out, cap_pin_0_mode); in mlx5_get_pps_caps()
455 clock->pps_info.pin_caps[1] = MLX5_GET(mtpps_reg, out, cap_pin_1_mode); in mlx5_get_pps_caps()
456 clock->pps_info.pin_caps[2] = MLX5_GET(mtpps_reg, out, cap_pin_2_mode); in mlx5_get_pps_caps()
457 clock->pps_info.pin_caps[3] = MLX5_GET(mtpps_reg, out, cap_pin_3_mode); in mlx5_get_pps_caps()
458 clock->pps_info.pin_caps[4] = MLX5_GET(mtpps_reg, out, cap_pin_4_mode); in mlx5_get_pps_caps()
459 clock->pps_info.pin_caps[5] = MLX5_GET(mtpps_reg, out, cap_pin_5_mode); in mlx5_get_pps_caps()
460 clock->pps_info.pin_caps[6] = MLX5_GET(mtpps_reg, out, cap_pin_6_mode); in mlx5_get_pps_caps()
[all …]
/Linux-v5.4/drivers/net/ethernet/mellanox/mlx5/core/fpga/
Dtls.c177 u32 syndrome = MLX5_GET(tls_resp, resp->sg[0].data, syndrome); in mlx5_fpga_tls_teardown_completion()
192 MLX5_SET(tls_cmd, cmd, ipv6, MLX5_GET(tls_flow, flow, ipv6)); in mlx5_fpga_tls_flow_to_cmd()
194 MLX5_GET(tls_flow, flow, direction_sx)); in mlx5_fpga_tls_flow_to_cmd()
317 ctx->syndrome = MLX5_GET(tls_resp, resp->sg[0].data, syndrome); in mlx5_fpga_tls_setup_completion()
338 MLX5_GET(tls_cmd, tls_cmd, swid), in mlx5_fpga_tls_setup_completion()
340 MLX5_GET(tls_cmd, tls_cmd, in mlx5_fpga_tls_setup_completion()
421 if (MLX5_GET(tls_extended_cap, buf, tx)) in mlx5_fpga_tls_get_caps()
423 if (MLX5_GET(tls_extended_cap, buf, rx)) in mlx5_fpga_tls_get_caps()
425 if (MLX5_GET(tls_extended_cap, buf, tls_v12)) in mlx5_fpga_tls_get_caps()
427 if (MLX5_GET(tls_extended_cap, buf, tls_v13)) in mlx5_fpga_tls_get_caps()
[all …]
Dipsec.c281 if (MLX5_GET(ipsec_extended_cap, fipsec->caps, v2_command)) in is_v2_sadb_supported()
339 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, esp)) in mlx5_fpga_ipsec_device_caps()
342 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, ipv6)) in mlx5_fpga_ipsec_device_caps()
345 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, lso)) in mlx5_fpga_ipsec_device_caps()
348 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, rx_no_trailer)) in mlx5_fpga_ipsec_device_caps()
351 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, esn)) { in mlx5_fpga_ipsec_device_caps()
366 return MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_count()
383 addr = (u64)MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_read()
385 ((u64)MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_read()
644 bool is_dmac = MLX5_GET(fte_match_set_lyr_2_4, outer_c, dmac_47_16) || in mlx5_is_fpga_egress_ipsec_rule()
[all …]
Dcmd.c137 query->status = MLX5_GET(fpga_ctrl, out, status); in mlx5_fpga_query()
138 query->admin_image = MLX5_GET(fpga_ctrl, out, flash_select_admin); in mlx5_fpga_query()
139 query->oper_image = MLX5_GET(fpga_ctrl, out, flash_select_oper); in mlx5_fpga_query()
160 *fpga_qpn = MLX5_GET(fpga_create_qp_out, out, fpga_qpn); in mlx5_fpga_create_qp()

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