| /Linux-v5.4/Documentation/fb/ |
| D | viafb.modes | 10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
77 # 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock)
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
98 # 640x480, 120 Hz, Non-Interlaced (52.406 MHz dotclock)
[all …]
|
| /Linux-v5.4/drivers/media/dvb-frontends/ |
| D | dvb-pll.c | 74 .min = 177 * MHz,
75 .max = 858 * MHz,
96 .min = 177 * MHz,
97 .max = 896 * MHz,
120 .min = 185 * MHz,
121 .max = 900 * MHz,
138 .min = 174 * MHz,
139 .max = 862 * MHz,
154 .min = 174 * MHz,
155 .max = 862 * MHz,
[all …]
|
| D | dvb_dummy_fe.c | 194 .frequency_min_hz = 51 * MHz,
195 .frequency_max_hz = 858 * MHz,
223 .frequency_min_hz = 950 * MHz,
224 .frequency_max_hz = 2150 * MHz,
|
| /Linux-v5.4/Documentation/media/uapi/dvb/ |
| D | fe-bandwidth-t.rst | 41 - 1.712 MHz
49 - 5 MHz
57 - 6 MHz
65 - 7 MHz
73 - 8 MHz
81 - 10 MHz
|
| /Linux-v5.4/Documentation/devicetree/bindings/mfd/ |
| D | omap-usb-host.txt | 40 * "usbhost_120m_fck" - 120MHz Functional clock.
43 * "refclk_60m_int" - 60MHz internal reference clock for UTMI clock mux
44 * "refclk_60m_ext_p1" - 60MHz external ref. clock for Port 1's UTMI clock mux.
45 * "refclk_60m_ext_p2" - 60MHz external ref. clock for Port 2's UTMI clock mux
51 * "usb_host_hs_hsic480m_p1_clk" - Port 1 480MHz HSIC clock gate.
52 * "usb_host_hs_hsic480m_p2_clk" - Port 2 480MHz HSIC clock gate.
53 * "usb_host_hs_hsic480m_p3_clk" - Port 3 480MHz HSIC clock gate.
54 * "usb_host_hs_hsic60m_p1_clk" - Port 1 60MHz HSIC clock gate.
55 * "usb_host_hs_hsic60m_p2_clk" - Port 2 60MHz HSIC clock gate.
56 * "usb_host_hs_hsic60m_p3_clk" - Port 3 60MHz HSIC clock gate.
|
| D | stmpe.txt | 28 0 -> 1.625 MHz 2 || 3 -> 6.5 MHz
29 1 -> 3.25 MHz
|
| /Linux-v5.4/arch/arm64/boot/dts/exynos/ |
| D | exynos5433-tmu.dtsi | 56 /* Set maximum frequency as 1800MHz */
62 /* Set maximum frequency as 1700MHz */
68 /* Set maximum frequency as 1600MHz */
74 /* Set maximum frequency as 1500MHz */
80 /* Set maximum frequency as 1400MHz */
86 /* Set maximum frequencyas 1200MHz */
92 /* Set maximum frequency as 1000MHz */
230 /* Set maximum frequency as 1200MHz */
236 /* Set maximum frequency as 1100MHz */
242 /* Set maximum frequency as 1000MHz */
[all …]
|
| /Linux-v5.4/drivers/staging/sm750fb/ |
| D | ddk750_chip.c | 9 #define MHz(x) ((x) * 1000000) macro
40 return MHz(130); in get_mxclk_freq()
102 if (frequency > MHz(336)) in set_memory_clock()
103 frequency = MHz(336); in set_memory_clock()
154 if (frequency > MHz(190)) in set_master_clock()
155 frequency = MHz(190); in set_master_clock()
241 set_chip_clock(MHz((unsigned int)pInitParam->chipClock)); in ddk750_init_hw()
244 set_memory_clock(MHz(pInitParam->memClock)); in ddk750_init_hw()
247 set_master_clock(MHz(pInitParam->masterClock)); in ddk750_init_hw()
|
| /Linux-v5.4/drivers/media/firewire/ |
| D | firedtv-fe.c | 173 fi->frequency_min_hz = 950 * MHz; in fdtv_frontend_init()
174 fi->frequency_max_hz = 2150 * MHz; in fdtv_frontend_init()
193 fi->frequency_min_hz = 950 * MHz; in fdtv_frontend_init()
194 fi->frequency_max_hz = 2150 * MHz; in fdtv_frontend_init()
213 fi->frequency_min_hz = 47 * MHz; in fdtv_frontend_init()
214 fi->frequency_max_hz = 866 * MHz; in fdtv_frontend_init()
231 fi->frequency_min_hz = 49 * MHz; in fdtv_frontend_init()
232 fi->frequency_max_hz = 861 * MHz; in fdtv_frontend_init()
|
| /Linux-v5.4/arch/arm/boot/dts/ |
| D | integratorcp.dts | 49 /* The codec chrystal operates at 24.576 MHz */
65 /* This is a 25MHz chrystal on the base board */
72 /* The UART clock is 14.74 MHz divided from 25MHz by an ICS525 */
87 /* 24 MHz chrystal on the core module */
121 /* The KMI clock is the 24 MHz oscillator divided to 8MHz */
130 /* The timer clock is the 24 MHz oscillator divided to 1MHz */
146 /* TIMER0 runs directly on the 25MHz chrystal */
152 /* TIMER1 runs @ 1MHz */
158 /* TIMER2 runs @ 1MHz */
294 /* 640x480 16bpp @ 25.175MHz is 36827428 bytes/s */
|
| D | rk3288-veyron-mickey.dts | 78 * and don't let the GPU go faster than 400 MHz.
98 * - 800 MHz (hot)
99 * - 800 MHz - 696 MHz (hotter)
100 * - 696 MHz - min (very hot)
103 * - 800 MHz appears to be a "sweet spot" for me. I can run
105 * - After 696 MHz we stop lowering voltage, so throttling
131 /* At very hot, don't let GPU go over 300 MHz */
172 /* After 1st level throttle the GPU down to as low as 400 MHz */
192 /* When hot, GPU goes down to 300 MHz */
198 /* When really hot, don't let GPU go _above_ 300 MHz */
|
| D | integratorap.dts | 30 * that the maximum frequency for this clock is 200 MHz
32 * is actually just hanging the system above 71 MHz.
58 /* 24 MHz chrystal on the Integrator/AP development board */
73 /* The UART clock is 14.74 MHz divided by an ICS525 */
82 /* 24 MHz chrystal on the core module */
98 /* Auxilary oscillator on the core module, 32.369MHz at boot */
127 /* One-bit control for the PCI bus clock (33 or 25 MHz) */
|
| /Linux-v5.4/drivers/media/tuners/ |
| D | qt1010_priv.h | 70 #define QT1010_MIN_FREQ (48 * MHz)
71 #define QT1010_MAX_FREQ (860 * MHz)
72 #define QT1010_OFFSET (1246 * MHz)
|
| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | armada3700-periph-clock.txt | 36 0 gbe-50 50 MHz parent clock for Gigabit Ethernet
38 2 gbe-125 125 MHz parent clock for Gigabit Ethernet
39 3 gbe1-50 50 MHz clock for Gigabit Ethernet port 1
40 4 gbe0-50 50 MHz clock for Gigabit Ethernet port 0
41 5 gbe1-125 125 MHz clock for Gigabit Ethernet port 1
42 6 gbe0-125 125 MHz clock for Gigabit Ethernet port 0
|
| /Linux-v5.4/Documentation/devicetree/bindings/display/bridge/ |
| D | toshiba,tc358767.txt | 8 clock rate must be 13 MHz, 19.2 MHz, 26 MHz, or 38.4 MHz.
|
| D | ti,sn65dsi86.txt | 29 clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.
|
| /Linux-v5.4/Documentation/devicetree/bindings/regulator/ |
| D | max8952.txt | 15 - 0: 26 MHz
16 - 1: 13 MHz
17 - 2: 19.2 MHz
18 Defaults to 26 MHz if not specified.
|
| /Linux-v5.4/Documentation/devicetree/bindings/usb/ |
| D | rockchip,dwc3.txt | 8 "ref_clk" Controller reference clk, have to be 24 MHz
9 "suspend_clk" Controller suspend clk, have to be 24 MHz or 32 KHz
10 "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
11 operation and >= 30MHz for HS operation
|
| /Linux-v5.4/Documentation/media/v4l-drivers/ |
| D | max2175.rst | 53 samples/sec with a 10.24 MHz sck.
56 samples/sec with a 32.768 MHz sck.
61 samples/sec with a 14.88375 MHz sck.
64 samples/sec with a 7.441875 MHz sck.
|
| /Linux-v5.4/Documentation/devicetree/bindings/mips/cavium/ |
| D | uctl.txt | 29 /* 12MHz, 24MHz and 48MHz allowed */
|
| /Linux-v5.4/arch/powerpc/boot/dts/ |
| D | media5200.dts | 29 timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot
30 bus-frequency = <132000000>; // 132 MHz
31 clock-frequency = <396000000>; // 396 MHz
40 bus-frequency = <132000000>;// 132 MHz
|
| /Linux-v5.4/Documentation/devicetree/bindings/input/touchscreen/ |
| D | stmpe.txt | 53 0 -> 1.625 MHz
54 1 -> 3.25 MHz
55 2 || 3 -> 6.5 MHz
79 /* 3.25 MHz ADC clock speed */
|
| /Linux-v5.4/tools/testing/selftests/intel_pstate/ |
| D | run.sh | 60 grep MHz /proc/cpuinfo | sort -u > /tmp/result.freqs
98 cpupower frequency-set -g powersave --max=${freq}MHz >& /dev/null
102 [ $EVALUATE_ONLY -eq 0 ] && cpupower frequency-set -g powersave --max=${max_freq}MHz >& /dev/null
|
| /Linux-v5.4/arch/mips/boot/dts/ingenic/ |
| D | gcw0.dts | 47 * We use a rate of 432 MHz, which is the least common multiple of
48 * 27 MHz (required by TV encoder) and 48 MHz (required by USB host).
|
| /Linux-v5.4/arch/arm/mach-pxa/ |
| D | sleep.S | 66 @ with core operating above 91 MHz
103 @ about suspending with PXBus operating above 133MHz
123 orrne r7, r7, #1 @@ 99.53MHz
150 @ need 6 13-MHz cycles before changing PWRMODE
151 @ just set frequency to 91-MHz... 6*91/13 = 42
|
