Searched refs:MG_PLL_DIV0 (Results 1 – 2 of 2) sorted by relevance
3077 hw_state->mg_pll_div0 = I915_READ(MG_PLL_DIV0(tc_port)); in mg_pll_get_hw_state()3219 I915_WRITE(MG_PLL_DIV0(tc_port), hw_state->mg_pll_div0); in icl_mg_pll_write()
9817 #define MG_PLL_DIV0(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV0_PORT1, \ macro
