Searched refs:MDIO_WC_REG_COMBO_IEEE0_MIICTRL (Results 1 – 2 of 2) sorted by relevance
4205 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, in bnx2x_warpcore_set_sgmii_speed()4210 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); in bnx2x_warpcore_set_sgmii_speed()4231 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, val16); in bnx2x_warpcore_set_sgmii_speed()4236 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); in bnx2x_warpcore_set_sgmii_speed()4308 {MDIO_WC_DEVAD, MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0x0140} in bnx2x_warpcore_clear_regs()4608 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0xBFFF); in bnx2x_warpcore_link_reset()4685 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, in bnx2x_set_warpcore_loopback()
7492 #define MDIO_WC_REG_COMBO_IEEE0_MIICTRL 0xffe0 macro
