Searched refs:MD0_HDLC (Results 1 – 4 of 4) sorted by relevance
440 case PARITY_CRC16_PR0: md0 = MD0_HDLC | MD0_CRC_16_0; break; in sca_open()441 case PARITY_CRC16_PR1: md0 = MD0_HDLC | MD0_CRC_16; break; in sca_open()442 case PARITY_CRC32_PR1_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU32; break; in sca_open()443 case PARITY_CRC16_PR1_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU; break; in sca_open()444 default: md0 = MD0_HDLC | MD0_CRC_NONE; in sca_open()
476 case PARITY_CRC16_PR0: md0 = MD0_HDLC | MD0_CRC_16_0; break; in sca_open()477 case PARITY_CRC16_PR1: md0 = MD0_HDLC | MD0_CRC_16; break; in sca_open()478 case PARITY_CRC16_PR0_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU_0; break; in sca_open()479 case PARITY_CRC16_PR1_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU; break; in sca_open()480 default: md0 = MD0_HDLC | MD0_CRC_NONE; in sca_open()
195 #define MD0_HDLC 0x80 /* Bit-sync HDLC mode */ macro
284 #define MD0_HDLC 0x80 /* Bit-sync HDLC mode */ macro