Searched refs:MC_SEQ_MISC_TIMING2_LP (Results 1 – 12 of 12) sorted by relevance
150 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
808 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
1871 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in btc_check_s0_mc_reg_index()2034 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in btc_initialize_mc_reg_table()
576 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
701 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
326 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
2783 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in ni_check_s0_mc_reg_index()2886 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in ni_initialize_mc_reg_table()
984 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING2_LP >> 2; in cypress_set_mc_reg_address_table()
5441 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in si_check_s0_mc_reg_index()5548 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in si_initialize_mc_reg_table()
4434 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in ci_check_s0_mc_reg_index()4645 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in ci_initialize_mc_reg_table()
578 #define MC_SEQ_MISC_TIMING2_LP 0xA9E macro
5895 *out_reg = MC_SEQ_MISC_TIMING2_LP; in si_check_s0_mc_reg_index()6002 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in si_initialize_mc_reg_table()
