Searched refs:MCR_DTR (Results 1 – 9 of 9) sorted by relevance
65 #define MCR_DTR 0x01 macro308 priv->line_control |= MCR_DTR; in spcp8x5_set_termios()426 priv->line_control |= MCR_DTR; in spcp8x5_tiocmset()430 priv->line_control &= ~MCR_DTR; in spcp8x5_tiocmset()454 result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0) in spcp8x5_tiocmget()
122 #define MCR_DTR 0x01 // Assert DTR macro
51 #define MCR_DTR 0x01 /* Assert DTR */ macro1479 result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0) in mos7840_tiocmget()1510 mcr &= ~MCR_DTR; in mos7840_tiocmset()1517 mcr |= MCR_DTR; in mos7840_tiocmset()1793 mos7840_port->shadowMCR |= (MCR_DTR | MCR_RTS); in mos7840_change_port_settings()
1525 status = ti_do_config(port, UMPC_SET_CLR_DTR, mcr & MCR_DTR); in restore_mcr()1924 edge_port->shadow_mcr = MCR_RTS | MCR_DTR; in edge_open()2395 mcr |= MCR_DTR; in edge_tiocmset()2402 mcr &= ~MCR_DTR; in edge_tiocmset()2426 result = ((mcr & MCR_DTR) ? TIOCM_DTR: 0) /* 0x002 */ in edge_tiocmget()
1602 mcr |= MCR_DTR; in edge_tiocmset()1609 mcr &= ~MCR_DTR; in edge_tiocmset()1630 result = ((mcr & MCR_DTR) ? TIOCM_DTR: 0) /* 0x002 */ in edge_tiocmget()2583 edge_port->shadowMCR |= (MCR_DTR | MCR_RTS); in change_port_settings()
131 #define MCR_DTR 0x0100 /* Data Terminal Ready */ macro
124 #define MCR_DTR (1 << 0) /* Data Terminal Ready */ macro
72 #define MCR_DTR 0x01 macro
181 #define MCR_DTR 0x01 /* DTR output */ macro226 #define PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */305 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_reset()320 bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR; in fpga_write()
