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Searched refs:LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7644 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT 0x00000001 macro
Ddce_8_0_sh_mask.h3204 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT 0x1 macro
Ddce_10_0_sh_mask.h3126 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT 0x1 macro
Ddce_11_0_sh_mask.h3196 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT 0x1 macro
Ddce_11_2_sh_mask.h3444 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT 0x1 macro
Ddce_12_0_sh_mask.h9271 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h43254 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT … macro
Ddcn_1_0_sh_mask.h40020 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT … macro
Ddcn_2_0_0_sh_mask.h48756 #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_DIGON__SHIFT … macro