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Searched refs:LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7612 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT 0x00000000 macro
Ddce_8_0_sh_mask.h3178 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT 0x0 macro
Ddce_10_0_sh_mask.h3100 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT 0x0 macro
Ddce_11_0_sh_mask.h3170 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT 0x0 macro
Ddce_11_2_sh_mask.h3418 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT 0x0 macro
Ddce_12_0_sh_mask.h9245 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h43228 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT … macro
Ddcn_1_0_sh_mask.h39994 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT … macro
Ddcn_2_0_0_sh_mask.h48730 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN__SHIFT … macro