| /Linux-v5.4/arch/sh/mm/ |
| D | flush-sh4.c | 19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region() 20 end = (aligned_start + size + L1_CACHE_BYTES-1) in sh4__flush_wback_region() 21 & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region() 22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region() 25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 30 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() [all …]
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| D | cache-sh2a.c | 57 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); in sh2a__flush_wback_region() 58 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) in sh2a__flush_wback_region() 59 & ~(L1_CACHE_BYTES-1); in sh2a__flush_wback_region() 70 for (v = begin; v < end; v += L1_CACHE_BYTES) { in sh2a__flush_wback_region() 78 for (v = begin; v < end; v += L1_CACHE_BYTES) in sh2a__flush_wback_region() 97 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); in sh2a__flush_purge_region() 98 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) in sh2a__flush_purge_region() 99 & ~(L1_CACHE_BYTES-1); in sh2a__flush_purge_region() 104 for (v = begin; v < end; v+=L1_CACHE_BYTES) { in sh2a__flush_purge_region() 127 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); in sh2a__flush_invalidate_region() [all …]
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| D | cache-sh2.c | 23 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); in sh2__flush_wback_region() 24 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) in sh2__flush_wback_region() 25 & ~(L1_CACHE_BYTES-1); in sh2__flush_wback_region() 26 for (v = begin; v < end; v+=L1_CACHE_BYTES) { in sh2__flush_wback_region() 44 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); in sh2__flush_purge_region() 45 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) in sh2__flush_purge_region() 46 & ~(L1_CACHE_BYTES-1); in sh2__flush_purge_region() 48 for (v = begin; v < end; v+=L1_CACHE_BYTES) in sh2__flush_purge_region() 75 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); in sh2__flush_invalidate_region() 76 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) in sh2__flush_invalidate_region() [all …]
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| D | cache-sh3.c | 40 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); in sh3__flush_wback_region() 41 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) in sh3__flush_wback_region() 42 & ~(L1_CACHE_BYTES-1); in sh3__flush_wback_region() 44 for (v = begin; v < end; v+=L1_CACHE_BYTES) { in sh3__flush_wback_region() 78 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); in sh3__flush_purge_region() 79 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) in sh3__flush_purge_region() 80 & ~(L1_CACHE_BYTES-1); in sh3__flush_purge_region() 82 for (v = begin; v < end; v+=L1_CACHE_BYTES) { in sh3__flush_purge_region()
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| D | cache-sh5.c | 83 addr += L1_CACHE_BYTES; in sh64_icache_inv_kernel_range() 228 addr += L1_CACHE_BYTES; in sh64_icache_inv_current_user_range() 234 #define DUMMY_ALLOCO_AREA_SIZE ((L1_CACHE_BYTES << 10) + (1024 * 4)) 345 magic_eaddr += L1_CACHE_BYTES; in sh64_dcache_purge_coloured_phy_page() 374 eaddr += L1_CACHE_BYTES; in sh64_dcache_purge_phy_page() 599 unsigned long end = (unsigned long)vaddr + L1_CACHE_BYTES; in sh5_flush_cache_sigtramp() 601 __flush_wback_region(vaddr, L1_CACHE_BYTES); in sh5_flush_cache_sigtramp()
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| /Linux-v5.4/arch/csky/mm/ |
| D | cachev2.c | 17 unsigned long i = start & ~(L1_CACHE_BYTES - 1); in icache_inv_range() 19 for (; i < end; i += L1_CACHE_BYTES) in icache_inv_range() 32 unsigned long i = start & ~(L1_CACHE_BYTES - 1); in dcache_wb_range() 34 for (; i < end; i += L1_CACHE_BYTES) in dcache_wb_range() 41 unsigned long i = start & ~(L1_CACHE_BYTES - 1); in dcache_inv_range() 43 for (; i < end; i += L1_CACHE_BYTES) in dcache_inv_range() 50 unsigned long i = start & ~(L1_CACHE_BYTES - 1); in cache_wbinv_range() 52 for (; i < end; i += L1_CACHE_BYTES) in cache_wbinv_range() 56 i = start & ~(L1_CACHE_BYTES - 1); in cache_wbinv_range() 57 for (; i < end; i += L1_CACHE_BYTES) in cache_wbinv_range() [all …]
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| /Linux-v5.4/arch/csky/kernel/ |
| D | vmlinux.lds.S | 29 PERCPU_SECTION(L1_CACHE_BYTES) 53 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) 57 EXCEPTION_TABLE(L1_CACHE_BYTES) 58 BSS_SECTION(L1_CACHE_BYTES, PAGE_SIZE, L1_CACHE_BYTES)
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| /Linux-v5.4/arch/hexagon/include/asm/ |
| D | cache.h | 13 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro 15 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 17 #define __cacheline_aligned __aligned(L1_CACHE_BYTES) 18 #define ____cacheline_aligned __aligned(L1_CACHE_BYTES)
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| /Linux-v5.4/arch/arm/lib/ |
| D | copy_page.S | 14 #define COPY_COUNT (PAGE_SZ / (2 * L1_CACHE_BYTES) PLD( -1 )) 27 PLD( pld [r1, #L1_CACHE_BYTES] ) 30 1: PLD( pld [r1, #2 * L1_CACHE_BYTES]) 31 PLD( pld [r1, #3 * L1_CACHE_BYTES]) 33 .rept (2 * L1_CACHE_BYTES / 16 - 1)
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| /Linux-v5.4/arch/powerpc/include/asm/ |
| D | page_32.h | 16 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 54 WARN_ON((unsigned long)addr & (L1_CACHE_BYTES - 1)); in clear_page() 56 for (i = 0; i < PAGE_SIZE / L1_CACHE_BYTES; i++, addr += L1_CACHE_BYTES) in clear_page()
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| D | cache.h | 30 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro 32 #define SMP_CACHE_BYTES L1_CACHE_BYTES 75 return L1_CACHE_BYTES; in l1_cache_bytes()
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| /Linux-v5.4/arch/arc/kernel/ |
| D | vmlinux.lds.S | 63 INIT_TEXT_SECTION(L1_CACHE_BYTES) 68 INIT_SETUP(L1_CACHE_BYTES) 79 PERCPU_SECTION(L1_CACHE_BYTES) 94 EXCEPTION_TABLE(L1_CACHE_BYTES) 104 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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| /Linux-v5.4/arch/alpha/include/asm/ |
| D | cache.h | 11 # define L1_CACHE_BYTES 64 macro 17 # define L1_CACHE_BYTES 32 macro 21 #define SMP_CACHE_BYTES L1_CACHE_BYTES
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| /Linux-v5.4/arch/xtensa/include/asm/ |
| D | cache.h | 17 #define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE macro 18 #define SMP_CACHE_BYTES L1_CACHE_BYTES 32 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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| /Linux-v5.4/arch/unicore32/kernel/ |
| D | vmlinux.lds.S | 30 PERCPU_SECTION(L1_CACHE_BYTES) 47 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) 50 EXCEPTION_TABLE(L1_CACHE_BYTES)
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| /Linux-v5.4/include/linux/ |
| D | cache.h | 9 #define L1_CACHE_ALIGN(x) __ALIGN_KERNEL(x, L1_CACHE_BYTES) 13 #define SMP_CACHE_BYTES L1_CACHE_BYTES 79 #define cache_line_size() L1_CACHE_BYTES
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| /Linux-v5.4/arch/nios2/kernel/ |
| D | vmlinux.lds.S | 42 EXCEPTION_TABLE(L1_CACHE_BYTES) 48 PERCPU_SECTION(L1_CACHE_BYTES) 53 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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| /Linux-v5.4/arch/riscv/kernel/ |
| D | vmlinux.lds.S | 36 PERCPU_SECTION(L1_CACHE_BYTES) 55 RO_DATA_SECTION(L1_CACHE_BYTES) 60 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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| /Linux-v5.4/arch/parisc/include/asm/ |
| D | cache.h | 16 #define L1_CACHE_BYTES 16 macro 21 #define SMP_CACHE_BYTES L1_CACHE_BYTES 23 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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| /Linux-v5.4/arch/c6x/include/asm/ |
| D | cache.h | 36 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro 45 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 46 #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES
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| /Linux-v5.4/arch/powerpc/lib/ |
| D | copy_32.S | 64 CACHELINE_BYTES = L1_CACHE_BYTES 66 CACHELINE_MASK = (L1_CACHE_BYTES-1) 214 #if L1_CACHE_BYTES >= 32 216 #if L1_CACHE_BYTES >= 64 219 #if L1_CACHE_BYTES >= 128 393 #if L1_CACHE_BYTES >= 32 395 #if L1_CACHE_BYTES >= 64 398 #if L1_CACHE_BYTES >= 128 451 #if L1_CACHE_BYTES >= 32 453 #if L1_CACHE_BYTES >= 64 [all …]
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| D | checksum_32.S | 125 CACHELINE_BYTES = L1_CACHE_BYTES 127 CACHELINE_MASK = (L1_CACHE_BYTES-1) 203 #if L1_CACHE_BYTES >= 32 205 #if L1_CACHE_BYTES >= 64 208 #if L1_CACHE_BYTES >= 128 279 #if L1_CACHE_BYTES >= 32 281 #if L1_CACHE_BYTES >= 64 284 #if L1_CACHE_BYTES >= 128
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| /Linux-v5.4/arch/nds32/include/asm/ |
| D | cache.h | 7 #define L1_CACHE_BYTES 32 macro 10 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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| /Linux-v5.4/arch/unicore32/include/asm/ |
| D | cache.h | 13 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro 22 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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| /Linux-v5.4/arch/m68k/include/asm/ |
| D | cache.h | 10 #define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) macro 12 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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