Searched refs:KVM_REG_SIZE_MASK (Results 1 – 12 of 12) sorted by relevance
40 return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE); in core_reg_offset_from_id()205 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM >> 32) in kvm_arm_get_reg()224 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM >> 32) in kvm_arm_set_reg()
723 switch (id & KVM_REG_SIZE_MASK) { in index_to_params()726 if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK in index_to_params()746 if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK in index_to_params()991 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in demux_c15_get()1016 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in demux_c15_set()1092 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in vfp_get_reg()1136 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in vfp_set_reg()
738 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) { in kvm_mips_get_reg()742 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) { in kvm_mips_get_reg()747 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) { in kvm_mips_get_reg()765 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) { in kvm_mips_set_reg()770 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) { in kvm_mips_set_reg()777 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) { in kvm_mips_set_reg()
59 return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE); in core_reg_offset_from_id()661 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32) in kvm_arm_get_reg()679 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32) in kvm_arm_set_reg()
2313 switch (id & KVM_REG_SIZE_MASK) { in index_to_params()2316 if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK in index_to_params()2491 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in demux_c15_get()2516 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in demux_c15_set()
35 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
48 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
393 (1ul << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
1152 #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL macro