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Searched refs:Interrupt (Results 1 – 25 of 384) sorted by relevance

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/Linux-v5.4/drivers/irqchip/
DKconfig91 bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
96 Support Amazon's Annapurna Labs Fabric Interrupt Controller.
231 Enable support for the Renesas Interrupt Controller for external
239 Enable support for the Renesas Interrupt Controller for external
246 Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
335 bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST
338 Enable support for the Renesas H8/300 Interrupt Controller, as found
381 bool "NPS400 Global Interrupt Manager (GIM)"
406 Support for the UniPhier AIDET (ARM Interrupt Detector).
409 bool "Meson GPIO Interrupt Multiplexer"
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/usb/
Dlpc32xx-udc.txt8 * USB Device Low Priority Interrupt
9 * USB Device High Priority Interrupt
10 * USB Device DMA Interrupt
11 * External USB Transceiver Interrupt (OTG ATX)
/Linux-v5.4/Documentation/scsi/
Dhptiop.txt18 0x24 Inbound Interrupt Status Register
19 0x28 Inbound Interrupt Mask Register
20 0x30 Outbound Interrupt Status Register
21 0x34 Outbound Interrupt Mask Register
33 0x24 Inbound Interrupt Status Register
34 0x28 Inbound Interrupt Mask Register
35 0x30 Outbound Interrupt Status Register
36 0x34 Outbound Interrupt Mask Register
44 0x20404 Inbound Interrupt Mask Register
46 0x2040C Outbound Interrupt Mask Register
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/timer/
Dsamsung,exynos4210-mct.txt24 0: Global Timer Interrupt 0
25 1: Global Timer Interrupt 1
26 2: Global Timer Interrupt 2
27 3: Global Timer Interrupt 3
28 4: Local Timer Interrupt 0
29 5: Local Timer Interrupt 1
32 i: Local Timer Interrupt n
Dsnps,arc-timer.txt1 Synopsys ARC Local Timer with Interrupt Capabilities
11 - interrupts : single Interrupt going into parent intc
/Linux-v5.4/Documentation/devicetree/bindings/interrupt-controller/
Dcsky,mpintc.txt2 C-SKY Multi-processors Interrupt Controller
5 C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
8 Interrupt number definition:
13 Interrupt triger mode: (Defined in dt-bindings/interrupt-controller/irq.h)
Dandestech,ativic32.txt1 * Andestech Internal Vector Interrupt Controller
3 The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
5 bigger External Vector Interrupt Controller.
Dti,sci-inta.txt1 Texas Instruments K3 Interrupt Aggregator
4 The Interrupt Aggregator (INTA) provides a centralized machine
10 Interrupt Aggregator
38 TISCI Interrupt Aggregator Node:
46 - ti,sci-dev-id: TISCI device ID of the Interrupt Aggregator.
Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
30 * Interrupt Specifier Definition
32 Interrupt specifiers consists of 2 cells encoded as follows:
88 // Interrupt source Peripheral 0
102 // Interrupt source SysWake 0 that is active-low level-sensitive
Dti,sci-intr.txt1 Texas Instruments K3 Interrupt Router
4 The Interrupt Router (INTR) module provides a mechanism to mux M
6 to be driven per N output. An Interrupt Router can either handle edge triggered
9 Interrupt Router
38 TISCI Interrupt Router Node:
Dti,c64x+megamod-pic.txt1 C6X Interrupt Chips
4 * C64X+ Core Interrupt Controller
16 Interrupt Specifier Definition
31 * C64x+ Megamodule Interrupt Controller
65 Interrupt Specifier Definition
Dcdns,xtensa-mx.txt1 * Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX)
Dintel,ce4100-ioapic.txt1 Interrupt chips
4 * Intel I/O Advanced Programmable Interrupt Controller (IO APIC)
Darm,vic.txt1 * ARM Vectored Interrupt Controller
3 One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
20 - interrupts : Interrupt source for parent controllers if the VIC is nested.
Dti,cp-intc.txt1 * TI Common Platform Interrupt Controller
3 Common Platform Interrupt Controller (cp_intc) is used on
Dmrvl,intc.txt1 * Marvell MMP Interrupt controller
42 * Marvell Orion Interrupt controller
49 - reg : Interrupt mask address. A list of 4 byte ranges, one per controller.
Damazon,al-fic.txt1 Amazon's Annapurna Labs Fabric Interrupt Controller
16 Interrupt Controllers bindings used by client devices.
Dimg,meta-intc.txt28 * Interrupt Specifier Definition
30 Interrupt specifiers consists of 2 cells encoded as follows:
75 // Interrupt source '5' that is level-sensitive.
Dmarvell,sei.txt1 Marvell SEI (System Error Interrupt) Controller
4 Marvell SEI (System Error Interrupt) controller is an interrupt
/Linux-v5.4/Documentation/devicetree/bindings/net/
Ddavinci_emac.txt15 4 sources: <Receive Threshold Interrupt
16 Receive Interrupt
17 Transmit Interrupt
18 Miscellaneous Interrupt>
/Linux-v5.4/Documentation/devicetree/bindings/crypto/
Dhisilicon,hip07-sec.txt13 - interrupts: Interrupt specifiers.
16 Interrupt 0 is for the SEC unit error queue.
17 Interrupt 2N + 1 is the completion interrupt for queue N.
18 Interrupt 2N + 2 is the error interrupt for queue N.
/Linux-v5.4/Documentation/virt/kvm/devices/
Dxive.txt1 POWER9 eXternal Interrupt Virtualization Engine (XIVE Gen1)
5 KVM_DEV_TYPE_XIVE POWER9 XIVE Interrupt Controller generation 1
22 1. Thread Interrupt Management Area (TIMA)
24 Each thread has an associated Thread Interrupt Management context
29 - Interrupt Pending Buffer (IPB)
84 Interrupt source number (64-bit)
91 -E2BIG: Interrupt source number is out of range
99 Interrupt source number (64-bit)
106 - eisn: Effective Interrupt Source Number
154 Interrupt source number (64-bit)
/Linux-v5.4/Documentation/driver-api/
Dsmsc_ece1099.rst15 Interrupt generation
22 any bit in one of the Interrupt Status registers is 1 and
23 the corresponding Interrupt Mask bit is also 1.
26 of an interrupt, it should first read the Group Interrupt Status Register
/Linux-v5.4/Documentation/devicetree/bindings/gpio/
Dgpio-ath79.txt15 - interrupts: Interrupt specifier for the controllers interrupt.
21 Interrupt Controllers bindings used by client devices.
/Linux-v5.4/Documentation/devicetree/bindings/iommu/
Drockchip,iommu.txt11 - interrupts : Interrupt specifier for the IOMMU instance
12 - interrupt-names : Interrupt name for the IOMMU instance

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