Searched refs:INTERLACE (Results 1 – 20 of 20) sorted by relevance
51 if (timing->flags.INTERLACE == 1) { in apply_front_porch_workaround()246 if (patched_crtc_timing.flags.INTERLACE == 1) in optc1_program_timing()252 if (patched_crtc_timing.flags.INTERLACE == 1) in optc1_program_timing()325 if (patched_crtc_timing.flags.INTERLACE == 1) { in optc1_set_vtg_params()531 if (timing->flags.INTERLACE == 1) in optc1_validate_timing()551 min_v_blank = timing->flags.INTERLACE?optc1->min_v_blank_interlace:optc1->min_v_blank; in optc1_validate_timing()
268 if (hw_crtc_timing.flags.INTERLACE) { in enc1_stream_encoder_dp_set_stream_attribute()
3066 if (timing->flags.INTERLACE == 1) { in apply_front_porch_workaround()3087 interlace_factor = patched_crtc_timing.flags.INTERLACE ? 2 : 1; in get_vupdate_offset_from_vsync()
179 uint32_t INTERLACE:1; member
119 uint32_t INTERLACE:1; member
171 # define INTERLACE BIT(26) macro
69 if (timing->flags.INTERLACE == 1) { in dce110_timing_generator_apply_front_porch_workaround()337 if (patched_crtc_timing.flags.INTERLACE == 1) in dce110_timing_generator_program_timing_generator()338 bp_params.flags.INTERLACE = 1; in dce110_timing_generator_program_timing_generator()1132 if (timing->flags.INTERLACE == 1) in dce110_timing_generator_validate_timing()
378 timing->flags.INTERLACE, in dce110_timing_generator_v_program_blanking()
1144 stream->timing.flags.INTERLACE; in build_audio_output()
683 uint32_t INTERLACE :1; member
245 uint32_t INTERLACE :1; member
425 if (bp_params->flags.INTERLACE) { in set_crtc_using_dtd_timing_v3()
1782 if (bp_params->flags.INTERLACE) { in set_crtc_timing_v1()1861 if (bp_params->flags.INTERLACE) { in set_crtc_using_dtd_timing_v3()
1279 info->lcd_timing.misc_info.INTERLACE = in get_embedded_panel_info_v1_2()1397 info->lcd_timing.misc_info.INTERLACE = in get_embedded_panel_info_v1_3()
909 info->lcd_timing.misc_info.INTERLACE = !!(lvds->lcd_timing.miscinfo & ATOM_INTERLACE); in get_embedded_panel_info_v2_1()
106 uint32_t interlace_factor = timing->flags.INTERLACE ? 2 : 1; in dce120_timing_generator_validate_timing()
295 if (hw_crtc_timing.flags.INTERLACE) { in dce110_stream_encoder_dp_set_stream_attribute()
1195 * (pipe->stream->timing.flags.INTERLACE ? 1 : 0); in dcn_validate_bandwidth()1201 * (pipe->stream->timing.flags.INTERLACE ? 1 : 0); in dcn_validate_bandwidth()
599 fbiinit5 |= INTERLACE; in sstfb_set_par()
1819 pipes[pipe_cnt].pipe.dest.interlaced = timing->flags.INTERLACE; in dcn20_populate_dml_pipes_from_context()
