Searched refs:INTEL_PMC_IDX_FIXED_BTS (Results 1 – 5 of 5) sorted by relevance
177 #define INTEL_PMC_IDX_FIXED_BTS (INTEL_PMC_IDX_FIXED + 16) macro
76 if (idx == INTEL_PMC_IDX_FIXED_BTS) in x86_perf_event_update()1062 if (hwc->idx == INTEL_PMC_IDX_FIXED_BTS) { in x86_assign_hw_event()1193 if (idx == INTEL_PMC_IDX_FIXED_BTS) in x86_perf_event_set_period()
515 if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) in bts_event_add()
1955 if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) in __intel_pmu_disable_all()1976 if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) { in __intel_pmu_enable_all()1978 cpuc->events[INTEL_PMC_IDX_FIXED_BTS]; in __intel_pmu_enable_all()2154 if (unlikely(hwc->idx == INTEL_PMC_IDX_FIXED_BTS)) { in intel_pmu_disable_event()2236 if (unlikely(hwc->idx == INTEL_PMC_IDX_FIXED_BTS)) { in intel_pmu_enable_event()2455 if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) { in intel_pmu_handle_irq_v4()
541 EVENT_CONSTRAINT(0, 1ULL << INTEL_PMC_IDX_FIXED_BTS, 0);589 struct perf_event *event = cpuc->events[INTEL_PMC_IDX_FIXED_BTS]; in intel_pmu_drain_bts_buffer()
