Searched refs:INTEL_PMC_IDX_FIXED (Results 1 – 6 of 6) sorted by relevance
11 #define INTEL_PMC_IDX_FIXED 32 macro159 #define INTEL_PMC_IDX_FIXED_INSTRUCTIONS (INTEL_PMC_IDX_FIXED + 0)163 #define INTEL_PMC_IDX_FIXED_CPU_CYCLES (INTEL_PMC_IDX_FIXED + 1)167 #define INTEL_PMC_IDX_FIXED_REF_CYCLES (INTEL_PMC_IDX_FIXED + 2)177 #define INTEL_PMC_IDX_FIXED_BTS (INTEL_PMC_IDX_FIXED + 16)
103 if (pmc_idx < INTEL_PMC_IDX_FIXED) in intel_pmc_idx_to_pmc()107 u32 idx = pmc_idx - INTEL_PMC_IDX_FIXED; in intel_pmc_idx_to_pmc()306 (((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED); in intel_pmu_refresh()336 pmu->fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED; in intel_pmu_init()
1132 if (idx >= INTEL_PMC_IDX_FIXED) in intel_pmu_pebs_enable()1133 idx = MAX_PEBS_EVENTS + (idx - INTEL_PMC_IDX_FIXED); in intel_pmu_pebs_enable()1833 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_nhm()1834 short error[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_nhm()1849 mask |= ((1ULL << x86_pmu.num_counters_fixed) - 1) << INTEL_PMC_IDX_FIXED; in intel_pmu_drain_pebs_nhm()1850 size = INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed; in intel_pmu_drain_pebs_nhm()1943 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_icl()1960 (((1ULL << x86_pmu.num_counters_fixed) - 1) << INTEL_PMC_IDX_FIXED); in intel_pmu_drain_pebs_icl()1961 size = INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed; in intel_pmu_drain_pebs_icl()
2134 int idx = hwc->idx - INTEL_PMC_IDX_FIXED; in intel_pmu_disable_fixed()2196 int idx = hwc->idx - INTEL_PMC_IDX_FIXED; in intel_pmu_enable_fixed()5109 ((1LL << x86_pmu.num_counters_fixed)-1) << INTEL_PMC_IDX_FIXED; in intel_pmu_init()5122 ~(~0ULL << (INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed)); in intel_pmu_init()
776 if (c->idxmsk64 & (~0ULL << INTEL_PMC_IDX_FIXED)) { in __perf_sched_find_counter()777 idx = INTEL_PMC_IDX_FIXED; in __perf_sched_find_counter()786 for_each_set_bit_from(idx, c->idxmsk, INTEL_PMC_IDX_FIXED) { in __perf_sched_find_counter()1065 } else if (hwc->idx >= INTEL_PMC_IDX_FIXED) { in x86_assign_hw_event()1067 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (hwc->idx - INTEL_PMC_IDX_FIXED); in x86_assign_hw_event()1068 hwc->event_base_rdpmc = (hwc->idx - INTEL_PMC_IDX_FIXED) | 1<<30; in x86_assign_hw_event()2152 if (x86_pmu.num_counters_fixed && idx >= INTEL_PMC_IDX_FIXED) { in x86_pmu_event_idx()2153 idx -= INTEL_PMC_IDX_FIXED; in x86_pmu_event_idx()
245 int idx = pmc_idx - INTEL_PMC_IDX_FIXED; in reprogram_counter()
