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Searched refs:INTEL_GEN (Results 1 – 25 of 87) sorted by relevance

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/Linux-v5.4/drivers/gpu/drm/i915/gt/
Dintel_gt.c64 if (INTEL_GEN(i915) < 4) in intel_gt_clear_error_registers()
82 if (INTEL_GEN(i915) >= 12) { in intel_gt_clear_error_registers()
85 } else if (INTEL_GEN(i915) >= 8) { in intel_gt_clear_error_registers()
88 } else if (INTEL_GEN(i915) >= 6) { in intel_gt_clear_error_registers()
126 if (INTEL_GEN(gt->i915) >= 12) { in gen8_check_faults()
167 if (INTEL_GEN(i915) >= 8) in intel_gt_check_and_clear_faults()
169 else if (INTEL_GEN(i915) >= 6) in intel_gt_check_and_clear_faults()
221 if (INTEL_GEN(gt->i915) < 6) in intel_gt_chipset_flush()
Dintel_gt_pm_irq.c20 if (INTEL_GEN(i915) >= 11) { in write_pm_imr()
23 } else if (INTEL_GEN(i915) >= 8) { in write_pm_imr()
65 i915_reg_t reg = INTEL_GEN(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_gt_pm_reset_iir()
81 if (INTEL_GEN(i915) >= 11) { in write_pm_ier()
84 } else if (INTEL_GEN(i915) >= 8) { in write_pm_ier()
Dintel_engine_cs.c163 switch (INTEL_GEN(dev_priv)) { in intel_engine_context_size()
165 MISSING_CASE(INTEL_GEN(dev_priv)); in intel_engine_context_size()
201 INTEL_GEN(dev_priv), in intel_engine_context_size()
218 if (INTEL_GEN(dev_priv) < 8) in intel_engine_context_size()
230 if (INTEL_GEN(i915) >= bases[i].gen) in __engine_mmio_base()
257 if (INTEL_GEN(engine->i915) < 6 && engine->class != RENDER_CLASS) in intel_engine_set_hwsp_writemask()
260 if (INTEL_GEN(engine->i915) >= 3) in intel_engine_set_hwsp_writemask()
347 if (INTEL_GEN(i915) >= 11 || in __setup_engine_capabilities()
348 (INTEL_GEN(i915) >= 9 && engine->instance == 0)) in __setup_engine_capabilities()
356 if ((INTEL_GEN(i915) >= 11 && in __setup_engine_capabilities()
[all …]
Dintel_workarounds.c604 else if (INTEL_GEN(i915) < 8) in __intel_engine_init_ctx_wa()
607 MISSING_CASE(INTEL_GEN(i915)); in __intel_engine_init_ctx_wa()
757 GEM_BUG_ON(INTEL_GEN(i915) < 10); in wa_init_mcr()
787 if (INTEL_GEN(i915) >= 10 && is_power_of_2(sseu->slice_mask)) { in wa_init_mcr()
809 if (INTEL_GEN(i915) >= 11) { in wa_init_mcr()
919 else if (INTEL_GEN(i915) <= 8) in gt_init_workarounds()
922 MISSING_CASE(INTEL_GEN(i915)); in gt_init_workarounds()
1225 else if (INTEL_GEN(i915) <= 8) in intel_engine_init_whitelist()
1228 MISSING_CASE(INTEL_GEN(i915)); in intel_engine_init_whitelist()
1389 if (I915_SELFTEST_ONLY(INTEL_GEN(engine->i915) < 8)) in engine_init_workarounds()
[all …]
Dintel_sseu.c41 if (INTEL_GEN(i915) < 9) in intel_sseu_make_rpcs()
115 if (INTEL_GEN(i915) >= 11) { in intel_sseu_make_rpcs()
Dintel_gt_pm.c47 if (INTEL_GEN(i915) >= 6) in __gt_unpark()
70 if (INTEL_GEN(i915) >= 6) in __gt_park()
Dintel_ringbuffer.c496 if (INTEL_GEN(engine->i915) >= 6) in set_hwstam()
511 if (INTEL_GEN(dev_priv) >= 4) in set_hws_pga()
605 if (INTEL_GEN(dev_priv) > 2) { in stop_ring()
721 if (INTEL_GEN(dev_priv) > 2) in xcs_resume()
2155 WARN_ON(INTEL_GEN(dev_priv) > 2 && in ring_destroy()
2173 if (INTEL_GEN(i915) >= 6) { in setup_irq()
2176 } else if (INTEL_GEN(i915) >= 5) { in setup_irq()
2179 } else if (INTEL_GEN(i915) >= 3) { in setup_irq()
2193 GEM_BUG_ON(INTEL_GEN(i915) >= 8); in setup_common()
2218 if (INTEL_GEN(i915) >= 6) in setup_common()
[all …]
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_suspend.c39 if (INTEL_GEN(dev_priv) <= 4) in i915_save_display()
43 if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv)) in i915_save_display()
50 if (INTEL_GEN(dev_priv) <= 4) in i915_restore_display()
57 if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv)) in i915_restore_display()
77 if (INTEL_GEN(dev_priv) < 7) in i915_save_state()
121 if (INTEL_GEN(dev_priv) < 7) in i915_restore_state()
Dintel_device_info.c685 if (INTEL_GEN(dev_priv) <= 4) { in read_timestamp_frequency()
693 } else if (INTEL_GEN(dev_priv) <= 8) { in read_timestamp_frequency()
701 } else if (INTEL_GEN(dev_priv) <= 9) { in read_timestamp_frequency()
719 } else if (INTEL_GEN(dev_priv) <= 12) { in read_timestamp_frequency()
733 if (INTEL_GEN(dev_priv) <= 10) in read_timestamp_frequency()
865 if (INTEL_GEN(dev_priv) >= 10) { in intel_device_info_runtime_init()
876 if (INTEL_GEN(dev_priv) >= 11) in intel_device_info_runtime_init()
898 } else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) { in intel_device_info_runtime_init()
931 } else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) { in intel_device_info_runtime_init()
941 if (INTEL_GEN(dev_priv) >= 12 && in intel_device_info_runtime_init()
[all …]
Di915_gpu_error.c430 if (ee->engine->class != RENDER_CLASS || INTEL_GEN(m->i915) <= 3) in error_print_instdone()
436 if (INTEL_GEN(m->i915) <= 6) in error_print_instdone()
508 if (INTEL_GEN(m->i915) >= 4) { in error_print_engine()
517 if (INTEL_GEN(m->i915) >= 6) { in error_print_engine()
524 if (INTEL_GEN(m->i915) >= 8) { in error_print_engine()
730 if (INTEL_GEN(m->i915) >= 8) in __err_print_to_sgl()
1044 if (INTEL_GEN(dev_priv) >= 6) { in gem_record_fences()
1049 } else if (INTEL_GEN(dev_priv) >= 4) { in gem_record_fences()
1068 if (INTEL_GEN(dev_priv) >= 6) { in error_record_engine_registers()
1071 if (INTEL_GEN(dev_priv) >= 12) in error_record_engine_registers()
[all …]
Di915_debugfs.c65 seq_printf(m, "gen: %d\n", INTEL_GEN(dev_priv)); in i915_capabilities()
494 } else if (INTEL_GEN(dev_priv) >= 11) { in i915_interrupt_info()
515 } else if (INTEL_GEN(dev_priv) >= 8) { in i915_interrupt_info()
613 if (INTEL_GEN(dev_priv) >= 11) { in i915_interrupt_info()
633 } else if (INTEL_GEN(dev_priv) >= 6) { in i915_interrupt_info()
828 } else if (INTEL_GEN(dev_priv) >= 6) { in i915_frequency_info()
852 if (INTEL_GEN(dev_priv) >= 9) in i915_frequency_info()
879 if (INTEL_GEN(dev_priv) >= 11) { in i915_frequency_info()
888 } else if (INTEL_GEN(dev_priv) >= 8) { in i915_frequency_info()
911 if (INTEL_GEN(dev_priv) <= 10) in i915_frequency_info()
[all …]
Di915_irq.c332 WARN_ON_ONCE(INTEL_GEN(dev_priv) >= 11); in gen6_pm_iir()
334 return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_pm_iir()
372 if (INTEL_GEN(dev_priv) >= 11) in gen6_enable_rps_interrupts()
412 if (INTEL_GEN(dev_priv) >= 11) in gen6_disable_rps_interrupts()
601 if (INTEL_GEN(dev_priv) < 5) in i915_pipestat_enable_mask()
700 if (INTEL_GEN(dev_priv) >= 4) in i915_enable_asle_pipestat()
956 bool use_scanline_counter = INTEL_GEN(dev_priv) >= 5 || in i915_get_crtc_scanoutpos()
1593 (INTEL_GEN(dev_priv) >= 8 && pipe_crc->skipped == 1)) { in display_pipe_crc_irq_handler()
1638 if (INTEL_GEN(dev_priv) >= 3) in i9xx_pipe_crc_irq_handler()
1643 if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_pipe_crc_irq_handler()
[all …]
Di915_gem_fence_reg.c69 if (INTEL_GEN(fence->i915) >= 6) { in i965_write_fence_reg()
562 if (INTEL_GEN(i915) >= 8 || IS_VALLEYVIEW(i915)) { in detect_bit_6_swizzle()
572 } else if (INTEL_GEN(i915) >= 6) { in detect_bit_6_swizzle()
831 if (INTEL_GEN(i915) >= 7 && in i915_ggtt_init_fences()
834 else if (INTEL_GEN(i915) >= 4 || in i915_ggtt_init_fences()
863 if (INTEL_GEN(i915) < 5 || in intel_gt_init_swizzling()
887 MISSING_CASE(INTEL_GEN(i915)); in intel_gt_init_swizzling()
Dintel_pm.c2601 if (INTEL_GEN(dev_priv) >= 8) in ilk_display_fifo_size()
2603 else if (INTEL_GEN(dev_priv) >= 7) in ilk_display_fifo_size()
2613 if (INTEL_GEN(dev_priv) >= 8) in ilk_plane_wm_reg_max()
2616 else if (INTEL_GEN(dev_priv) >= 7) in ilk_plane_wm_reg_max()
2630 if (INTEL_GEN(dev_priv) >= 7) in ilk_cursor_wm_reg_max()
2638 if (INTEL_GEN(dev_priv) >= 8) in ilk_fbc_wm_reg_max()
2666 if (INTEL_GEN(dev_priv) <= 6) in ilk_plane_wm_max()
2829 if (INTEL_GEN(dev_priv) >= 9) { in intel_read_wm_latency()
2919 } else if (INTEL_GEN(dev_priv) >= 6) { in intel_read_wm_latency()
2926 } else if (INTEL_GEN(dev_priv) >= 5) { in intel_read_wm_latency()
[all …]
/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_psr.c114 if (INTEL_GEN(dev_priv) >= 8) in intel_psr_irq_control()
179 if (INTEL_GEN(dev_priv) >= 8) in intel_psr_irq_handler()
215 if (INTEL_GEN(dev_priv) >= 9) { in intel_psr_irq_handler()
311 if (INTEL_GEN(dev_priv) >= 9 && in intel_psr_init_dpcd()
421 if (INTEL_GEN(dev_priv) >= 8) in intel_psr_enable_sink()
435 if (INTEL_GEN(dev_priv) >= 11) in intel_psr1_get_tp_time()
491 if (INTEL_GEN(dev_priv) >= 8) in hsw_activate_psr1()
512 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in hsw_activate_psr2()
557 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { in intel_psr2_config_valid()
651 if (INTEL_GEN(dev_priv) >= 9) in intel_psr_activate()
[all …]
Dintel_fbc.c55 return INTEL_GEN(dev_priv) <= 3; in no_fbc_on_multiple_pipes()
93 else if (INTEL_GEN(dev_priv) >= 8) in intel_fbc_calculate_cfb_size()
357 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_is_active()
371 if (INTEL_GEN(dev_priv) >= 7) in intel_fbc_hw_activate()
373 else if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_activate()
387 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_deactivate()
480 if (ret && INTEL_GEN(dev_priv) <= 4) { in find_compression_threshold()
513 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_alloc_cfb()
636 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { in intel_fbc_hw_tracking_covers_screen()
639 } else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv)) { in intel_fbc_hw_tracking_covers_screen()
[all …]
Dintel_display.c1075 if (INTEL_GEN(dev_priv) >= 4) { in intel_wait_for_pipe_off()
1509 if (INTEL_GEN(dev_priv) >= 4) { in i9xx_enable_pll()
1776 if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_crtc_max_vblank_count()
1778 else if (INTEL_GEN(dev_priv) >= 3) in intel_crtc_max_vblank_count()
2020 if (INTEL_GEN(dev_priv) >= 9) in intel_linear_alignment()
2025 else if (INTEL_GEN(dev_priv) >= 4) in intel_linear_alignment()
2044 if (INTEL_GEN(dev_priv) >= 9) in intel_surf_alignment()
2063 return INTEL_GEN(dev_priv) < 4 || in intel_plane_uses_fence()
2143 if (ret != 0 && INTEL_GEN(dev_priv) < 4) { in intel_pin_and_fence_fb_obj()
2527 if (INTEL_GEN(dev_priv) >= 7) in intel_fb_max_stride()
[all …]
Dintel_color.c157 if (INTEL_GEN(dev_priv) >= 7) { in ilk_update_pipe_csc()
483 if (INTEL_GEN(dev_priv) >= 11) in skl_color_commit()
626 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { in ivb_load_lut_ext_max()
1068 (INTEL_GEN(dev_priv) < 9 && in need_plane_update()
1447 } else if (INTEL_GEN(dev_priv) >= 4) { in intel_color_init()
1457 if (INTEL_GEN(dev_priv) >= 11) in intel_color_init()
1459 else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in intel_color_init()
1461 else if (INTEL_GEN(dev_priv) >= 7) in intel_color_init()
1466 if (INTEL_GEN(dev_priv) >= 9) in intel_color_init()
1473 if (INTEL_GEN(dev_priv) >= 11) in intel_color_init()
[all …]
Dintel_pipe_crc.c413 else if (INTEL_GEN(dev_priv) < 5) in get_new_crc_ctl_reg()
419 else if (INTEL_GEN(dev_priv) < 9) in get_new_crc_ctl_reg()
547 else if (INTEL_GEN(dev_priv) < 5) in intel_is_valid_crc_source()
553 else if (INTEL_GEN(dev_priv) < 9) in intel_is_valid_crc_source()
Dintel_sprite.c336 return INTEL_GEN(dev_priv) >= 11 && in icl_is_hdr_plane()
566 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in skl_program_plane()
615 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in skl_program_plane()
629 if (INTEL_GEN(dev_priv) < 11) in skl_program_plane()
1593 if (INTEL_GEN(dev_priv) < 7) { in g4x_sprite_check()
1624 if (INTEL_GEN(dev_priv) >= 7) in g4x_sprite_check()
1721 if (INTEL_GEN(dev_priv) >= 11) in skl_plane_check_fb()
1856 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in skl_plane_check()
1865 return INTEL_GEN(dev_priv) >= 9; in has_dst_key_in_primary_plane()
1889 if (INTEL_GEN(dev_priv) >= 9 && plane->id != PLANE_PRIMARY && in intel_plane_set_ckey()
[all …]
Dintel_ddi.c875 if (INTEL_GEN(dev_priv) >= 11) { in intel_ddi_hdmi_level()
1683 if (INTEL_GEN(dev_priv) >= 11) in intel_ddi_clock_get()
1691 else if (INTEL_GEN(dev_priv) <= 8) in intel_ddi_clock_get()
1776 if (INTEL_GEN(dev_priv) >= 12) in intel_ddi_enable_transcoder_func()
1859 if (INTEL_GEN(dev_priv) >= 12) { in intel_ddi_disable_transcoder_func()
2025 if (INTEL_GEN(dev_priv) >= 12) { in intel_ddi_get_encoder_pipes()
2155 if (INTEL_GEN(dev_priv) >= 12) in intel_ddi_enable_pipe_clock()
2170 if (INTEL_GEN(dev_priv) >= 12) in intel_ddi_disable_pipe_clock()
2272 if (INTEL_GEN(dev_priv) >= 11) { in intel_ddi_dp_voltage_max()
2745 if (INTEL_GEN(dev_priv) >= 11) in bxt_signal_levels()
[all …]
/Linux-v5.4/drivers/gpu/drm/i915/gem/
Di915_gem_tiling.c65 if (INTEL_GEN(i915) >= 4) { in i915_gem_fence_size()
105 if (INTEL_GEN(i915) >= 4) in i915_gem_fence_alignment()
133 if (INTEL_GEN(i915) >= 7) { in i915_tiling_ok()
136 } else if (INTEL_GEN(i915) >= 4) { in i915_tiling_ok()
/Linux-v5.4/drivers/gpu/drm/i915/gem/selftests/
Di915_gem_mman.c256 if (INTEL_GEN(i915) <= 2) { in igt_partial_tiling()
271 if (INTEL_GEN(i915) < 4) in igt_partial_tiling()
273 else if (INTEL_GEN(i915) < 7) in igt_partial_tiling()
286 if (pitch > 2 && INTEL_GEN(i915) >= 4) { in igt_partial_tiling()
295 if (pitch < max_pitch && INTEL_GEN(i915) >= 4) { in igt_partial_tiling()
305 if (INTEL_GEN(i915) >= 4) { in igt_partial_tiling()
Digt_gem_utils.c45 const int gen = INTEL_GEN(vma->vm->i915); in igt_emit_store_dw()
132 if (INTEL_GEN(vm->i915) <= 5) in igt_gpu_fill_dw()
/Linux-v5.4/drivers/gpu/drm/i915/gvt/
Dfb_decoder.c154 if (INTEL_GEN(dev_priv) >= 9) { in intel_vgpu_get_stride()
218 if (INTEL_GEN(dev_priv) >= 9) { in intel_vgpu_decode_primary_plane()
259 (INTEL_GEN(dev_priv) >= 9) ? in intel_vgpu_decode_primary_plane()

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